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[3/9] drm/i915: Use frame counter for intel_wait_for_vblank() on CTG

Message ID 1384828358-31563-4-git-send-email-rodrigo.vivi@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Rodrigo Vivi Nov. 19, 2013, 2:32 a.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Use the same wait_for_vblank code for CTG that we use for ILK+.

Also fix the name of the frame counter register while at it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
---
 drivers/gpu/drm/i915/intel_display.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Comments

Chris Wilson Nov. 19, 2013, 1:46 p.m. UTC | #1 
On Mon, Nov 18, 2013 at 06:32:32PM -0800, Rodrigo Vivi wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Use the same wait_for_vblank code for CTG that we use for ILK+.
> 
> Also fix the name of the frame counter register while at it.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
Daniel Vetter Nov. 19, 2013, 4:38 p.m. UTC | #2 
On Tue, Nov 19, 2013 at 01:46:55PM +0000, Chris Wilson wrote:
> On Mon, Nov 18, 2013 at 06:32:32PM -0800, Rodrigo Vivi wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > Use the same wait_for_vblank code for CTG that we use for ILK+.
> > 
> > Also fix the name of the frame counter register while at it.
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

Already merged as 57e22f4add51b, apparently from a previous -collector
round (sinc it has your sob on it). Rebase gone wrong?
-Daniel
Rodrigo Vivi Nov. 19, 2013, 5:26 p.m. UTC | #3 
no idea what happened here...
maybe I lost a rebase on my scripts... will rebase or just remove for now

Thanks

On Tue, Nov 19, 2013 at 8:38 AM, Daniel Vetter <daniel@ffwll.ch> wrote:
> On Tue, Nov 19, 2013 at 01:46:55PM +0000, Chris Wilson wrote:
>> On Mon, Nov 18, 2013 at 06:32:32PM -0800, Rodrigo Vivi wrote:
>> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> >
>> > Use the same wait_for_vblank code for CTG that we use for ILK+.
>> >
>> > Also fix the name of the frame counter register while at it.
>> >
>> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
>> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
>
> Already merged as 57e22f4add51b, apparently from a previous -collector
> round (sinc it has your sob on it). Rebase gone wrong?
> -Daniel
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> +41 (0) 79 365 57 48 - http://blog.ffwll.ch
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 64390f3..7595d5a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -748,10 +748,10 @@  enum transcoder intel_pipe_to_cpu_transcoder(struct drm_i915_private *dev_priv,
 	return intel_crtc->config.cpu_transcoder;
 }
 
-static void ironlake_wait_for_vblank(struct drm_device *dev, int pipe)
+static void g4x_wait_for_vblank(struct drm_device *dev, int pipe)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
-	u32 frame, frame_reg = PIPEFRAME(pipe);
+	u32 frame, frame_reg = PIPE_FRMCOUNT_GM45(pipe);
 
 	frame = I915_READ(frame_reg);
 
@@ -772,8 +772,8 @@  void intel_wait_for_vblank(struct drm_device *dev, int pipe)
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	int pipestat_reg = PIPESTAT(pipe);
 
-	if (INTEL_INFO(dev)->gen >= 5) {
-		ironlake_wait_for_vblank(dev, pipe);
+	if (IS_G4X(dev) || INTEL_INFO(dev)->gen >= 5) {
+		g4x_wait_for_vblank(dev, pipe);
 		return;
 	}