diff mbox

[igt,1/2] tools/quick_dump: Update Baytrail DPIO names to reflect to the driver change.

Message ID 1386161073-29067-1-git-send-email-chon.ming.lee@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Chon Ming Lee Dec. 4, 2013, 12:44 p.m. UTC 
DPIO name still using old name.  Change it according to the driver name.

Signed-off-by: Chon Ming Lee <chon.ming.lee@intel.com>
---
 tools/quick_dump/vlv_dpio.txt | 104 +++++++++++++++++++++---------------------
 1 file changed, 51 insertions(+), 53 deletions(-)

Comments

Ville Syrjala Dec. 5, 2013, 11:09 a.m. UTC | #1 
On Wed, Dec 04, 2013 at 08:44:32PM +0800, Chon Ming Lee wrote:
> DPIO name still using old name.  Change it according to the driver name.
> 
> Signed-off-by: Chon Ming Lee <chon.ming.lee@intel.com>

Thanks. Both patches pushed.
Ville Syrjala Dec. 5, 2013, 1:11 p.m. UTC | #2 
On Wed, Dec 04, 2013 at 08:44:32PM +0800, Chon Ming Lee wrote:
...
> +('DPIO_TX3_DW4_CH0', '0x690', 'DPIO')
> +('DPIO_TX3_DW4_CH1', '0x2a90', 'DPIO')
...
> +('DPIO_TX_DW4_CH0', '0x8290', 'DPIO')
> +('DPIO_TX_DW4_CH1', '0x8490', 'DPIO')

One thing I've been wondering is what answer do we get when we read a
register using group or broadcast access, but the actual registers have
different values? I don't remember seeing an answer in any spec. Anyone
else know the answer? I was thinking I should try it next time a VLV
crosses my desk.
diff mbox

Patch

diff --git a/tools/quick_dump/vlv_dpio.txt b/tools/quick_dump/vlv_dpio.txt
index 28626da..2942d37 100644
--- a/tools/quick_dump/vlv_dpio.txt
+++ b/tools/quick_dump/vlv_dpio.txt
@@ -1,54 +1,52 @@ 
 ('DPIO_CTL', '0x182110', '')
-('DPIO_TX3_SWING_CTL4_A', '0x690', 'DPIO')
-('DPIO_TX3_SWING_CTL4_B', '0x2a90', 'DPIO')
-('DPIO_DIV_A', '0x800c', 'DPIO')
-('DPIO_DIV_B', '0x802c', 'DPIO')
-('DPIO_REFSFR_A', '0x8014', 'DPIO')
-('DPIO_REFSFR_B', '0x8034', 'DPIO')
-('DPIO_CORE_CLK_A', '0x801c', 'DPIO')
-('DPIO_CORE_CLK_B', '0x803c', 'DPIO')
-('DPIO_IREF_CTL_A', '0x8040', 'DPIO')
-('DPIO_IREF_CTL_B', '0x8060', 'DPIO')
-('DPIO_IREF_BCAST', '0xc044', 'DPIO')
-('DPIO_IREF_A', '0x8044', 'DPIO')
-('DPIO_IREF_B', '0x8064', 'DPIO')
-('DPIO_PLL_CML_A', '0x804c', 'DPIO')
-('DPIO_PLL_CML_B', '0x806c', 'DPIO')
-('DPIO_LPF_COEFF_A', '0x8048', 'DPIO')
-('DPIO_LPF_COEFF_B', '0x8068', 'DPIO')
-('DPIO_CALIBRATION', '0x80ac', 'DPIO')
-('DPIO_FASTCLK_DISABLE', '0x8100', 'DPIO')
-('DPIO_PCS_TX_0', '0x8200', 'DPIO')
-('DPIO_PCS_TX_1', '0x8400', 'DPIO')
-('DPIO_PCS_CLK_0', '0x8204', 'DPIO')
-('DPIO_PCS_CLK_1', '0x8404', 'DPIO')
-('DPIO_PCS_CTL_OVR1_A', '0x8224', 'DPIO')
-('DPIO_PCS_CTL_OVR1_B', '0x8424', 'DPIO')
-('DPIO_PCS_STAGGER0_A', '0x822c', 'DPIO')
-('DPIO_PCS_STAGGER0_B', '0x842c', 'DPIO')
-('DPIO_PCS_STAGGER1_A', '0x8230', 'DPIO')
-('DPIO_PCS_STAGGER1_B', '0x8430', 'DPIO')
-('DPIO_PCS_CLOCKBUF0_A', '0x8238', 'DPIO')
-('DPIO_PCS_CLOCKBUF0_B', '0x8438', 'DPIO')
-('DPIO_PCS_CLOCKBUF8_A', '0x825c', 'DPIO')
-('DPIO_PCS_CLOCKBUF8_B', '0x845c', 'DPIO')
-('DPIO_TX_SWING_CTL2_A', '0x8288', 'DPIO')
-('DPIO_TX_SWING_CTL2_B', '0x8488', 'DPIO')
-('DPIO_TX_SWING_CTL3_A', '0x828c', 'DPIO')
-('DPIO_TX_SWING_CTL3_B', '0x848c', 'DPIO')
-('DPIO_TX_SWING_CTL4_A', '0x8290', 'DPIO')
-('DPIO_TX_SWING_CTL4_B', '0x8490', 'DPIO')
-('DPIO_TX_OCALINIT_0', '0x8294', 'DPIO')
-('DPIO_TX_OCALINIT_1', '0x8494', 'DPIO')
-('DPIO_TX_CTL_0', '0x82ac', 'DPIO')
-('DPIO_TX_CTL_1', '0x84ac', 'DPIO')
-('DPIO_TX_LANE_0', '0x82b8', 'DPIO')
-('DPIO_TX_LANE_1', '0x84b8', 'DPIO')
-('DPIO_DATA_CHANNEL1', '0x8220', 'DPIO')
-('DPIO_DATA_CHANNEL2', '0x8420', 'DPIO')
-('DPIO_PORT0_PCS0', '0x0220', 'DPIO')
-('DPIO_PORT0_PCS1', '0x0420', 'DPIO')
-('DPIO_PORT1_PCS2', '0x2620', 'DPIO')
-('DPIO_PORT1_PCS3', '0x2820', 'DPIO')
-('DPIO_DATA_CHANNEL1', '0x8220', 'DPIO')
-('DPIO_DATA_CHANNEL2', '0x8420', 'DPIO')
+('DPIO_TX3_DW4_CH0', '0x690', 'DPIO')
+('DPIO_TX3_DW4_CH1', '0x2a90', 'DPIO')
+('DPIO_PLL_DW3_CH0', '0x800c', 'DPIO')
+('DPIO_PLL_DW3_CH1', '0x802c', 'DPIO')
+('DPIO_PLL_DW5_CH0', '0x8014', 'DPIO')
+('DPIO_PLL_DW5_CH1', '0x8034', 'DPIO')
+('DPIO_PLL_DW7_CH0', '0x801c', 'DPIO')
+('DPIO_PLL_DW7_CH1', '0x803c', 'DPIO')
+('DPIO_PLL_DW8_CH0', '0x8040', 'DPIO')
+('DPIO_PLL_DW8_CH1', '0x8060', 'DPIO')
+('DPIO_PLL_DW9_BCAST', '0xc044', 'DPIO')
+('DPIO_PLL_DW9_CH0', '0x8044', 'DPIO')
+('DPIO_PLL_DW9_CH1', '0x8064', 'DPIO')
+('DPIO_PLL_DW10_CH0', '0x8048', 'DPIO')
+('DPIO_PLL_DW10_CH1', '0x8068', 'DPIO')
+('DPIO_PLL_DW11_CH0', '0x804c', 'DPIO')
+('DPIO_PLL_DW11_CH1', '0x806c', 'DPIO')
+('DPIO_REF_DW13', '0x80ac', 'DPIO')
+('DPIO_CMN_DW0', '0x8100', 'DPIO')
+('DPIO_PCS_DW0_CH0', '0x8200', 'DPIO')
+('DPIO_PCS_DW0_CH1', '0x8400', 'DPIO')
+('DPIO_PCS_DW1_CH0', '0x8204', 'DPIO')
+('DPIO_PCS_DW1_CH1', '0x8404', 'DPIO')
+('DPIO_PCS01_DW8_CH0', '0x0220', 'DPIO')
+('DPIO_PCS23_DW8_CH0', '0x0420', 'DPIO')
+('DPIO_PCS01_DW8_CH1', '0x2620', 'DPIO')
+('DPIO_PCS23_DW8_CH1', '0x2820', 'DPIO')
+('DPIO_PCS_DW8_CH0', '0x8220', 'DPIO')
+('DPIO_PCS_DW8_CH1', '0x8420', 'DPIO')
+('DPIO_PCS_DW9_CH0', '0x8224', 'DPIO')
+('DPIO_PCS_DW9_CH1', '0x8424', 'DPIO')
+('DPIO_PCS_DW11_CH0', '0x822c', 'DPIO')
+('DPIO_PCS_DW11_CH1', '0x842c', 'DPIO')
+('DPIO_PCS_DW12_CH0', '0x8230', 'DPIO')
+('DPIO_PCS_DW12_CH1', '0x8430', 'DPIO')
+('DPIO_PCS_DW14_CH0', '0x8238', 'DPIO')
+('DPIO_PCS_DW14_CH1', '0x8438', 'DPIO')
+('DPIO_PCS_DW23_CH0', '0x825c', 'DPIO')
+('DPIO_PCS_DW23_CH1', '0x845c', 'DPIO')
+('DPIO_TX_DW2_CH0', '0x8288', 'DPIO')
+('DPIO_TX_DW2_CH1', '0x8488', 'DPIO')
+('DPIO_TX_DW3_CH0', '0x828c', 'DPIO')
+('DPIO_TX_DW3_CH1', '0x848c', 'DPIO')
+('DPIO_TX_DW4_CH0', '0x8290', 'DPIO')
+('DPIO_TX_DW4_CH1', '0x8490', 'DPIO')
+('DPIO_TX_DW5_CH0', '0x8294', 'DPIO')
+('DPIO_TX_DW5_CH1', '0x8494', 'DPIO')
+('DPIO_TX_DW11_CH0', '0x82ac', 'DPIO')
+('DPIO_TX_DW11_CH1', '0x84ac', 'DPIO')
+('DPIO_TX_DW14_CH0', '0x82b8', 'DPIO')
+('DPIO_TX_DW14_CH1', '0x84b8', 'DPIO')