From patchwork Fri Jan 17 15:51:09 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paulo Zanoni X-Patchwork-Id: 3505911 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 4B9D7C02DC for ; Fri, 17 Jan 2014 15:51:40 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 29CAF20179 for ; Fri, 17 Jan 2014 15:51:39 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 4D16320172 for ; Fri, 17 Jan 2014 15:51:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5F97D106855; Fri, 17 Jan 2014 07:51:36 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-qe0-f46.google.com (mail-qe0-f46.google.com [209.85.128.46]) by gabe.freedesktop.org (Postfix) with ESMTP id D0DB7106751 for ; Fri, 17 Jan 2014 07:51:30 -0800 (PST) Received: by mail-qe0-f46.google.com with SMTP id 8so4076137qea.33 for ; Fri, 17 Jan 2014 07:51:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=2zDnmirZoHLiOFm+gJVcICSfIan5KRr0ID7AzJ5+2zE=; b=juZV7YMAMnG+16Cs4SMAK2CM6faLLFmKJ3gHgEtDd2Yng7Ymif17JAPxqXD1QTDgEA N6ustbqXuVm0aUNtmNnI/x7NZaKXxSQv1bJctH7wsTsjnFeKpq9SWBzI/jgy7vsuWsQc s4IHHL4BQXWvIr/UtO3qLs+ZEWIhnVA/pVemFMoNX9kmlBLakILiysdkWkIEsON/bTgT jvfJxidc25csKKNcyR93tJwi6Pqy2yUg48JdGpfM/HJU2bn3gqciI5kpTTb3uE9cA7GF rF1O26pI5t8siGvNeEigdSuy8Zx2Ida1OX4wuAT/D4YfD6T2hgvcB8GPWTh0klERxBSw tVtA== X-Received: by 10.140.96.17 with SMTP id j17mr4117830qge.112.1389973889833; Fri, 17 Jan 2014 07:51:29 -0800 (PST) Received: from localhost.localdomain ([177.96.29.155]) by mx.google.com with ESMTPSA id w104sm2901857qge.5.2014.01.17.07.51.28 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 17 Jan 2014 07:51:29 -0800 (PST) From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Fri, 17 Jan 2014 13:51:09 -0200 Message-Id: <1389973873-2005-1-git-send-email-przanoni@gmail.com> X-Mailer: git-send-email 1.8.4.2 In-Reply-To: References: Cc: Paulo Zanoni Subject: [Intel-gfx] [PATCH 4/3] drm/i915: pass intel_crtc as argument for intel_enable_pipe X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Paulo Zanoni We want to remove those 3 boolean arguments. This is the first step. The "pipe" passed as the argument is always intel_crtc->pipe. Also adjust the function documentation. Signed-off-by: Paulo Zanoni Reviewed-by: Damien Lespiau --- drivers/gpu/drm/i915/intel_display.c | 29 ++++++++++++++--------------- 1 file changed, 14 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 332aa2d..e5fabba 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1744,21 +1744,20 @@ static void lpt_disable_pch_transcoder(struct drm_i915_private *dev_priv) /** * intel_enable_pipe - enable a pipe, asserting requirements - * @dev_priv: i915 private structure - * @pipe: pipe to enable + * @crtc: crtc responsible for the pipe * @pch_port: on ILK+, is this pipe driving a PCH port or not + * @dsi: output type is DSI + * @wait_for_vblank: whether we should for a vblank or not after enabling it * - * Enable @pipe, making sure that various hardware specific requirements + * Enable @crtc's pipe, making sure that various hardware specific requirements * are met, if applicable, e.g. PLL enabled, LVDS pairs enabled, etc. - * - * @pipe should be %PIPE_A or %PIPE_B. - * - * Will wait until the pipe is actually running (i.e. first vblank) before - * returning. */ -static void intel_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe, +static void intel_enable_pipe(struct intel_crtc *crtc, bool pch_port, bool dsi, bool wait_for_vblank) { + struct drm_device *dev = crtc->base.dev; + struct drm_i915_private *dev_priv = dev->dev_private; + enum pipe pipe = crtc->pipe; enum transcoder cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv, pipe); enum pipe pch_transcoder; @@ -3565,8 +3564,8 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) intel_crtc_load_lut(crtc); intel_update_watermarks(crtc); - intel_enable_pipe(dev_priv, pipe, - intel_crtc->config.has_pch_encoder, false, true); + intel_enable_pipe(intel_crtc, intel_crtc->config.has_pch_encoder, false, + true); intel_enable_primary_plane(dev_priv, plane, pipe); intel_enable_planes(crtc); intel_crtc_update_cursor(crtc, true); @@ -3711,8 +3710,8 @@ static void haswell_crtc_enable(struct drm_crtc *crtc) intel_ddi_enable_transcoder_func(crtc); intel_update_watermarks(crtc); - intel_enable_pipe(dev_priv, pipe, - intel_crtc->config.has_pch_encoder, false, false); + intel_enable_pipe(intel_crtc, intel_crtc->config.has_pch_encoder, false, + false); if (intel_crtc->config.has_pch_encoder) lpt_pch_enable(crtc); @@ -4137,7 +4136,7 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc) intel_crtc_load_lut(crtc); intel_update_watermarks(crtc); - intel_enable_pipe(dev_priv, pipe, false, is_dsi, true); + intel_enable_pipe(intel_crtc, false, is_dsi, true); intel_enable_primary_plane(dev_priv, plane, pipe); intel_enable_planes(crtc); intel_crtc_update_cursor(crtc, true); @@ -4175,7 +4174,7 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc) intel_crtc_load_lut(crtc); intel_update_watermarks(crtc); - intel_enable_pipe(dev_priv, pipe, false, false, true); + intel_enable_pipe(intel_crtc, false, false, true); intel_enable_primary_plane(dev_priv, plane, pipe); intel_enable_planes(crtc); /* The fixup needs to happen before cursor is enabled */