@@ -1745,7 +1745,6 @@ static void lpt_disable_pch_transcoder(struct drm_i915_private *dev_priv)
/**
* intel_enable_pipe - enable a pipe, asserting requirements
* @crtc: crtc responsible for the pipe
- * @pch_port: on ILK+, is this pipe driving a PCH port or not
* @dsi: output type is DSI
* @wait_for_vblank: whether we should for a vblank or not after enabling it
*
@@ -1753,7 +1752,7 @@ static void lpt_disable_pch_transcoder(struct drm_i915_private *dev_priv)
* are met, if applicable, e.g. PLL enabled, LVDS pairs enabled, etc.
*/
static void intel_enable_pipe(struct intel_crtc *crtc,
- bool pch_port, bool dsi, bool wait_for_vblank)
+ bool dsi, bool wait_for_vblank)
{
struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = dev->dev_private;
@@ -1784,7 +1783,7 @@ static void intel_enable_pipe(struct intel_crtc *crtc,
else
assert_pll_enabled(dev_priv, pipe);
else {
- if (pch_port) {
+ if (crtc->config.has_pch_encoder) {
/* if driving the PCH, we need FDI enabled */
assert_fdi_rx_pll_enabled(dev_priv, pch_transcoder);
assert_fdi_tx_pll_enabled(dev_priv,
@@ -3564,8 +3563,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
intel_crtc_load_lut(crtc);
intel_update_watermarks(crtc);
- intel_enable_pipe(intel_crtc, intel_crtc->config.has_pch_encoder, false,
- true);
+ intel_enable_pipe(intel_crtc, false, true);
intel_enable_primary_plane(dev_priv, plane, pipe);
intel_enable_planes(crtc);
intel_crtc_update_cursor(crtc, true);
@@ -3710,8 +3708,7 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
intel_ddi_enable_transcoder_func(crtc);
intel_update_watermarks(crtc);
- intel_enable_pipe(intel_crtc, intel_crtc->config.has_pch_encoder, false,
- false);
+ intel_enable_pipe(intel_crtc, false, false);
if (intel_crtc->config.has_pch_encoder)
lpt_pch_enable(crtc);
@@ -4136,7 +4133,7 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
intel_crtc_load_lut(crtc);
intel_update_watermarks(crtc);
- intel_enable_pipe(intel_crtc, false, is_dsi, true);
+ intel_enable_pipe(intel_crtc, is_dsi, true);
intel_enable_primary_plane(dev_priv, plane, pipe);
intel_enable_planes(crtc);
intel_crtc_update_cursor(crtc, true);
@@ -4174,7 +4171,7 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
intel_crtc_load_lut(crtc);
intel_update_watermarks(crtc);
- intel_enable_pipe(intel_crtc, false, false, true);
+ intel_enable_pipe(intel_crtc, false, true);
intel_enable_primary_plane(dev_priv, plane, pipe);
intel_enable_planes(crtc);
/* The fixup needs to happen before cursor is enabled */