From patchwork Wed Jan 22 19:52:25 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paulo Zanoni X-Patchwork-Id: 3525261 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 55FF69F1C3 for ; Wed, 22 Jan 2014 19:54:30 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7BE6020179 for ; Wed, 22 Jan 2014 19:54:29 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 9F5102011D for ; Wed, 22 Jan 2014 19:54:28 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7502EFBB19; Wed, 22 Jan 2014 11:54:27 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-gg0-f169.google.com (mail-gg0-f169.google.com [209.85.161.169]) by gabe.freedesktop.org (Postfix) with ESMTP id C318C1059E0 for ; Wed, 22 Jan 2014 11:53:25 -0800 (PST) Received: by mail-gg0-f169.google.com with SMTP id j5so94ggn.0 for ; Wed, 22 Jan 2014 11:53:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=zGyYuOF9Datsm32rdV5aA2bS8s7HZta/ncH5K2rBPpM=; b=gHWQchtusOhbTbIGI+rGWJUK1uzdyMbvO0VJ9uaz1kPrz0nOL0mnU5ALItWe4gw0Ew cNSQIorz5mPWw1bDGtVB+DSkq+11Q+OXWk2xIuQ4n2gZIX6iVZqd57l8plqpxYzIEJ/7 juumnSZGQZzu+Jfif6em8JzjcBABRHoHvKjDHzbvNbAFyfov5pn34w+oHd5GZzClPv9K dlPJKFz3MeynOlRdYaeyK20mC7yTwHCgBmslq1nWNL/Vd4m+Ta6VuYAumSNgmiGd1VbQ V2mKQfv3Vs59LkgS0A9Sr9UX/WCLrca7+0X7x6JlSmVXnlltAjrJLpxwAzh3ctknK6w+ muqA== X-Received: by 10.236.111.38 with SMTP id v26mr3674714yhg.40.1390420405032; Wed, 22 Jan 2014 11:53:25 -0800 (PST) Received: from localhost.localdomain ([187.112.59.220]) by mx.google.com with ESMTPSA id f78sm27457275yhp.12.2014.01.22.11.53.23 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 22 Jan 2014 11:53:24 -0800 (PST) From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Wed, 22 Jan 2014 17:52:25 -0200 Message-Id: <1390420357-23669-8-git-send-email-przanoni@gmail.com> X-Mailer: git-send-email 1.8.4.2 In-Reply-To: <1390420357-23669-1-git-send-email-przanoni@gmail.com> References: <1390420357-23669-1-git-send-email-przanoni@gmail.com> Cc: Paulo Zanoni Subject: [Intel-gfx] [PATCH 07/19] drm/i915: add GEN5_IRQ_INIT X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Paulo Zanoni And the equivalent GEN8_IRQ_INIT_NDX macro. These macros are for the postinstall functions. The next patch will improve this macro. Notice that I could have included POSTING_READ calls to the macro, but that would mean the code would do a few more POSTING_READs than necessary. OTOH it would be more fail-proof. I can change that if needed. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_irq.c | 33 ++++++++++++++++++--------------- 1 file changed, 18 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index b77cbb8..095baa7 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -103,6 +103,16 @@ static const u32 hpd_status_i915[] = { /* i915 and valleyview are the same */ I915_WRITE(type##IIR, 0xffffffff); \ } while (0) +#define GEN8_IRQ_INIT_NDX(type, which, imr_val, ier_val) do { \ + I915_WRITE(GEN8_##type##_IMR(which), (imr_val)); \ + I915_WRITE(GEN8_##type##_IER(which), (ier_val)); \ +} while (0) + +#define GEN5_IRQ_INIT(type, imr_val, ier_val) do { \ + I915_WRITE(type##IMR, (imr_val)); \ + I915_WRITE(type##IER, (ier_val)); \ +} while (0) + /* For display hotplug interrupt */ static void ironlake_enable_display_irq(drm_i915_private_t *dev_priv, u32 mask) @@ -2789,9 +2799,7 @@ static void gen5_gt_irq_postinstall(struct drm_device *dev) } I915_WRITE(GTIIR, I915_READ(GTIIR)); - I915_WRITE(GTIMR, dev_priv->gt_irq_mask); - I915_WRITE(GTIER, gt_irqs); - POSTING_READ(GTIER); + GEN5_IRQ_INIT(GT, dev_priv->gt_irq_mask, gt_irqs); if (INTEL_INFO(dev)->gen >= 6) { pm_irqs |= GEN6_PM_RPS_EVENTS; @@ -2801,10 +2809,9 @@ static void gen5_gt_irq_postinstall(struct drm_device *dev) dev_priv->pm_irq_mask = 0xffffffff; I915_WRITE(GEN6_PMIIR, I915_READ(GEN6_PMIIR)); - I915_WRITE(GEN6_PMIMR, dev_priv->pm_irq_mask); - I915_WRITE(GEN6_PMIER, pm_irqs); - POSTING_READ(GEN6_PMIER); + GEN5_IRQ_INIT(GEN6_PM, dev_priv->pm_irq_mask, pm_irqs); } + POSTING_READ(GTIER); } static int ironlake_irq_postinstall(struct drm_device *dev) @@ -2837,9 +2844,7 @@ static int ironlake_irq_postinstall(struct drm_device *dev) /* should always can generate irq */ I915_WRITE(DEIIR, I915_READ(DEIIR)); - I915_WRITE(DEIMR, dev_priv->irq_mask); - I915_WRITE(DEIER, display_mask | extra_mask); - POSTING_READ(DEIER); + GEN5_IRQ_INIT(DE, dev_priv->irq_mask, display_mask | extra_mask); gen5_gt_irq_postinstall(dev); @@ -2935,8 +2940,7 @@ static void gen8_gt_irq_postinstall(struct drm_i915_private *dev_priv) if (tmp) DRM_ERROR("Interrupt (%d) should have been masked in pre-install 0x%08x\n", i, tmp); - I915_WRITE(GEN8_GT_IMR(i), ~gt_interrupts[i]); - I915_WRITE(GEN8_GT_IER(i), gt_interrupts[i]); + GEN8_IRQ_INIT_NDX(GT, i, ~gt_interrupts[i], gt_interrupts[i]); } POSTING_READ(GEN8_GT_IER(0)); } @@ -2959,13 +2963,12 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv) if (tmp) DRM_ERROR("Interrupt (%d) should have been masked in pre-install 0x%08x\n", pipe, tmp); - I915_WRITE(GEN8_DE_PIPE_IMR(pipe), dev_priv->de_irq_mask[pipe]); - I915_WRITE(GEN8_DE_PIPE_IER(pipe), de_pipe_enables); + GEN8_IRQ_INIT_NDX(DE_PIPE, pipe, dev_priv->de_irq_mask[pipe], + de_pipe_enables); } POSTING_READ(GEN8_DE_PIPE_ISR(0)); - I915_WRITE(GEN8_DE_PORT_IMR, ~GEN8_AUX_CHANNEL_A); - I915_WRITE(GEN8_DE_PORT_IER, GEN8_AUX_CHANNEL_A); + GEN5_IRQ_INIT(GEN8_DE_PORT_, ~GEN8_AUX_CHANNEL_A, GEN8_AUX_CHANNEL_A); POSTING_READ(GEN8_DE_PORT_IER); }