From patchwork Tue Feb 4 17:37:01 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: jeff.mcgee@intel.com X-Patchwork-Id: 3578291 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id AD8D2C02DC for ; Tue, 4 Feb 2014 17:29:42 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CD70B20158 for ; Tue, 4 Feb 2014 17:29:41 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id AAD9E200FF for ; Tue, 4 Feb 2014 17:29:40 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CC666106C25; Tue, 4 Feb 2014 09:29:31 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id DF6BA106C25 for ; Tue, 4 Feb 2014 09:29:28 -0800 (PST) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga102.fm.intel.com with ESMTP; 04 Feb 2014 09:29:28 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.95,781,1384329600"; d="scan'208";a="475898922" Received: from jeffdesk.fso.intel.com ([10.5.53.1]) by fmsmga002.fm.intel.com with ESMTP; 04 Feb 2014 09:29:26 -0800 From: jeff.mcgee@intel.com To: intel-gfx@lists.freedesktop.org Date: Tue, 4 Feb 2014 11:37:01 -0600 Message-Id: <1391535421-28132-1-git-send-email-jeff.mcgee@intel.com> X-Mailer: git-send-email 1.8.5.2 In-Reply-To: <20131113190957.GF7251@phenom.ffwll.local> References: <20131113190957.GF7251@phenom.ffwll.local> Subject: [Intel-gfx] [PATCH v3] drm/i915: Update rps interrupt limits X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Jeff McGee sysfs changes to rps min and max delay were only triggering an update of the rps interrupt limits if the active delay required an update. This change ensures that interrupt limits are always updated. v2: correct compile issue missed on rebase v3: add igt testcases to signed-off-by section Testcase: igt/pm_rps/min-max-config-idle Testcase: igt/pm_rps/min-max-config-loaded Signed-off-by: Jeff McGee --- drivers/gpu/drm/i915/i915_sysfs.c | 10 ++++++++++ drivers/gpu/drm/i915/intel_pm.c | 11 ++++++++++- 2 files changed, 20 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c index 33bcae3..0c741f4 100644 --- a/drivers/gpu/drm/i915/i915_sysfs.c +++ b/drivers/gpu/drm/i915/i915_sysfs.c @@ -357,6 +357,11 @@ static ssize_t gt_max_freq_mhz_store(struct device *kdev, else gen6_set_rps(dev, val); } + else if (!IS_VALLEYVIEW(dev)) + /* We still need gen6_set_rps to process the new max_delay + and update the interrupt limits even though frequency + request is unchanged. */ + gen6_set_rps(dev, dev_priv->rps.cur_delay); mutex_unlock(&dev_priv->rps.hw_lock); @@ -426,6 +431,11 @@ static ssize_t gt_min_freq_mhz_store(struct device *kdev, else gen6_set_rps(dev, val); } + else if (!IS_VALLEYVIEW(dev)) + /* We still need gen6_set_rps to process the new min_delay + and update the interrupt limits even though frequency + request is unchanged. */ + gen6_set_rps(dev, dev_priv->rps.cur_delay); mutex_unlock(&dev_priv->rps.hw_lock); diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 9ab3883..2570789 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3003,6 +3003,9 @@ static void gen6_set_rps_thresholds(struct drm_i915_private *dev_priv, u8 val) dev_priv->rps.last_adj = 0; } +/* gen6_set_rps is called to update the frequency request, but should also be + * called when the range (min_delay and max_delay) is modified so that we can + * update the GEN6_RP_INTERRUPT_LIMITS register accordingly. */ void gen6_set_rps(struct drm_device *dev, u8 val) { struct drm_i915_private *dev_priv = dev->dev_private; @@ -3011,8 +3014,14 @@ void gen6_set_rps(struct drm_device *dev, u8 val) WARN_ON(val > dev_priv->rps.max_delay); WARN_ON(val < dev_priv->rps.min_delay); - if (val == dev_priv->rps.cur_delay) + if (val == dev_priv->rps.cur_delay) { + /* min/max delay may still have been modified so be sure to + * write the limits value */ + I915_WRITE(GEN6_RP_INTERRUPT_LIMITS, + gen6_rps_limits(dev_priv, val)); + return; + } gen6_set_rps_thresholds(dev_priv, val);