From patchwork Thu Feb 6 21:46:38 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rodrigo Vivi X-Patchwork-Id: 3598481 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 61A94BF418 for ; Thu, 6 Feb 2014 21:46:49 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 38419200FF for ; Thu, 6 Feb 2014 21:46:48 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 294A9200FE for ; Thu, 6 Feb 2014 21:46:47 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9F49FFB803; Thu, 6 Feb 2014 13:46:45 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-pd0-f172.google.com (mail-pd0-f172.google.com [209.85.192.172]) by gabe.freedesktop.org (Postfix) with ESMTP id 18244FB803 for ; Thu, 6 Feb 2014 13:46:44 -0800 (PST) Received: by mail-pd0-f172.google.com with SMTP id p10so2239050pdj.17 for ; Thu, 06 Feb 2014 13:46:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=W/C7EYWkaTNm+EjE3+NPTjYk/fWpuLlEXwVr0GTJBVg=; b=GLDYEeIeZ1YDoT/QToREuYYUwrqL54QRUin/P5xthN/dhIcNMBJKzUsxXzPYEd128Y ZEvoqRTo0PVgjtTXm6HwcSRafyFCq+vMzOk3jGbu0PKJk/Be+fMUdaqskAJgsSci303D ZlDPFZAl4IqJTgmFf0sL6jn4XCgQV+yUzkVDZH2hYx9Cg1S6OwobmIpOwugUwK1gBZ4u 0t15cjEDsYW86ZUScyOf4PyqikloB/LZKDeOAZ7A9btx3c0+GZc/CALyMQ9bxe2rotKS OOkm9qbo1DvCh3EhogL5fcbsW5evGn4LShopZ7GY7V1Ns2bl5vx+OsfvbclFqkFL3vmv UplQ== X-Received: by 10.66.197.135 with SMTP id iu7mr3154656pac.149.1391723203888; Thu, 06 Feb 2014 13:46:43 -0800 (PST) Received: from localhost (jfdmzpr06-ext.jf.intel.com. [134.134.137.75]) by mx.google.com with ESMTPSA id zc6sm15961303pab.18.2014.02.06.13.46.41 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 06 Feb 2014 13:46:43 -0800 (PST) From: Rodrigo Vivi To: intel-gfx@lists.freedesktop.org Date: Thu, 6 Feb 2014 19:46:38 -0200 Message-Id: <1391723198-4577-1-git-send-email-rodrigo.vivi@gmail.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <20140206183619.GA5078@nuc-i3427.alporthouse.com> References: <20140206183619.GA5078@nuc-i3427.alporthouse.com> Cc: , ChrisWilsonchris@chris-wilson.co.uk Subject: [Intel-gfx] [PATCH] tests/gem_gtt_hog: Fix for BDW X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Update XY_COLOR_BLT command for Broadwell. v2: stash devid and remove ugly double allocation. (by Chris). v3: fix inverted blt command size and stash fd, devid and intel_gen. Cc: Chris Wilson chris@chris-wilson.co.uk> Signed-off-by: Rodrigo Vivi --- tests/gem_gtt_hog.c | 59 +++++++++++++++++++++++++++++++++++------------------ 1 file changed, 39 insertions(+), 20 deletions(-) diff --git a/tests/gem_gtt_hog.c b/tests/gem_gtt_hog.c index 53cd7eb..3149ff4 100644 --- a/tests/gem_gtt_hog.c +++ b/tests/gem_gtt_hog.c @@ -44,30 +44,43 @@ static const uint32_t canary = 0xdeadbeef; +typedef struct data { + int fd; + int devid; + int intel_gen; +} data_t; + static double elapsed(const struct timeval *start, const struct timeval *end) { return 1e6*(end->tv_sec - start->tv_sec) + (end->tv_usec - start->tv_usec); } -static void busy(int fd, uint32_t handle, int size, int loops) +static void busy(data_t *data, uint32_t handle, int size, int loops) { struct drm_i915_gem_relocation_entry reloc[20]; struct drm_i915_gem_exec_object2 gem_exec[2]; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_pwrite gem_pwrite; struct drm_i915_gem_create create; - uint32_t buf[122], *b; - int i; + uint32_t buf[170], *b; + int i, b_size; memset(reloc, 0, sizeof(reloc)); memset(gem_exec, 0, sizeof(gem_exec)); memset(&execbuf, 0, sizeof(execbuf)); b = buf; + b_size = sizeof(uint32_t) * (data->intel_gen >= 8 ? 170 : 122); for (i = 0; i < 20; i++) { - *b++ = XY_COLOR_BLT_CMD_NOLEN | 4 | - COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB; + if (data->intel_gen >= 8) { + *b++ = MI_NOOP; + *b++ = XY_COLOR_BLT_CMD_NOLEN | 5 | + COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB; + } else { + *b++ = XY_COLOR_BLT_CMD_NOLEN | 4 | + COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB; + } *b++ = 0xf0 << 16 | 1 << 25 | 1 << 24 | 4096; *b++ = 0; *b++ = size >> 12 << 16 | 1024; @@ -76,6 +89,8 @@ static void busy(int fd, uint32_t handle, int size, int loops) reloc[i].read_domains = I915_GEM_DOMAIN_RENDER; reloc[i].write_domain = I915_GEM_DOMAIN_RENDER; *b++ = 0; + if (data->intel_gen >= 8) + *b++ = 0; *b++ = canary; } *b++ = MI_BATCH_BUFFER_END; @@ -86,56 +101,55 @@ static void busy(int fd, uint32_t handle, int size, int loops) create.handle = 0; create.size = 4096; - drmIoctl(fd, DRM_IOCTL_I915_GEM_CREATE, &create); + drmIoctl(data->fd, DRM_IOCTL_I915_GEM_CREATE, &create); gem_exec[1].handle = create.handle; gem_exec[1].relocation_count = 20; gem_exec[1].relocs_ptr = (uintptr_t)reloc; execbuf.buffers_ptr = (uintptr_t)gem_exec; execbuf.buffer_count = 2; - execbuf.batch_len = sizeof(buf); + execbuf.batch_len = b_size; execbuf.flags = 1 << 11; - if (HAS_BLT_RING(intel_get_drm_devid(fd))) + if (HAS_BLT_RING(data->devid)) execbuf.flags |= I915_EXEC_BLT; gem_pwrite.handle = gem_exec[1].handle; gem_pwrite.offset = 0; - gem_pwrite.size = sizeof(buf); + gem_pwrite.size = b_size; gem_pwrite.data_ptr = (uintptr_t)buf; - if (drmIoctl(fd, DRM_IOCTL_I915_GEM_PWRITE, &gem_pwrite) == 0) { + if (drmIoctl(data->fd, DRM_IOCTL_I915_GEM_PWRITE, &gem_pwrite) == 0) { while (loops--) - drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); + drmIoctl(data->fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); } - drmIoctl(fd, DRM_IOCTL_GEM_CLOSE, &create.handle); + drmIoctl(data->fd, DRM_IOCTL_GEM_CLOSE, &create.handle); } -static void run(int child) +static void run(data_t *data, int child) { const int size = 4096 * (256 + child * child); const int tiling = child % 2; const int write = child % 2; - int fd = drm_open_any(); - uint32_t handle = gem_create(fd, size); + uint32_t handle = gem_create(data->fd, size); uint32_t *ptr; uint32_t x; igt_assert(handle); if (tiling != I915_TILING_NONE) - gem_set_tiling(fd, handle, tiling, 4096); + gem_set_tiling(data->fd, handle, tiling, 4096); /* load up the unfaulted bo */ - busy(fd, handle, size, 100); + busy(data, handle, size, 100); /* Note that we ignore the API and rely on the implict * set-to-gtt-domain within the fault handler. */ if (write) { - ptr = gem_mmap(fd, handle, size, PROT_READ | PROT_WRITE); + ptr = gem_mmap(data->fd, handle, size, PROT_READ | PROT_WRITE); ptr[rand() % (size / 4)] = canary; } else - ptr = gem_mmap(fd, handle, size, PROT_READ); + ptr = gem_mmap(data->fd, handle, size, PROT_READ); x = ptr[rand() % (size / 4)]; munmap(ptr, size); @@ -147,15 +161,20 @@ igt_simple_main { struct timeval start, end; pid_t children[64]; + data_t data = {}; int n; igt_skip_on_simulation(); + data.fd = drm_open_any(); + data.devid = intel_get_drm_devid(data.fd); + data.intel_gen = intel_gen(data.devid); + gettimeofday(&start, NULL); for (n = 0; n < ARRAY_SIZE(children); n++) { switch ((children[n] = fork())) { case -1: igt_assert(0); - case 0: run(n); break; + case 0: run(&data, n); break; default: break; } }