From patchwork Fri Feb 7 18:09:47 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Rodrigo Vivi X-Patchwork-Id: 3607111 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D791E9F344 for ; Fri, 7 Feb 2014 18:10:47 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1657E20115 for ; Fri, 7 Feb 2014 18:10:47 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 207D020114 for ; Fri, 7 Feb 2014 18:10:46 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 27F73FBC59; Fri, 7 Feb 2014 10:10:44 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-pd0-f170.google.com (mail-pd0-f170.google.com [209.85.192.170]) by gabe.freedesktop.org (Postfix) with ESMTP id ABBACFBC59 for ; Fri, 7 Feb 2014 10:10:42 -0800 (PST) Received: by mail-pd0-f170.google.com with SMTP id p10so3455479pdj.15 for ; Fri, 07 Feb 2014 10:10:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:mime-version:content-type :content-transfer-encoding; bh=yKxQ+gcPSPY0yob0Q3bhV9Nl73FdXZoIoZ5BoHXueQQ=; b=iYvmSNza5h6QRoCyK4BrfxHFabH/hZ/sTkyRdXVcJkIyWgWP4rySB/FoVcmRv8MKD9 Ne37Aju/NL9MChLpCTuZohNAW3l4czRqgFlgToQ1HeuT4vowenV/7YdHaIOJ/Ax26lSs t/n4xDRbty8ArUrXXLGZtuAtTtzLOIMf2IFnWFe3LSx1Uy41SJtW4Thdv8HEGRhRx+8g tjpMp8ijd2LtVe/paQUmKwhLIGhNrqmpPtu8UtU4KFu4p7XZNXKb5Bkn5mn+Wvas+kJx r9zap6M6lJ09yPcvbdPHQuAfAQRiNEIeIl7mIcrlXXfOLsGwkNubtkyVfvXYghtIw0xs m2Hw== X-Received: by 10.66.161.38 with SMTP id xp6mr9406244pab.145.1391796642482; Fri, 07 Feb 2014 10:10:42 -0800 (PST) Received: from localhost (jfdmzpr04-ext.jf.intel.com. [134.134.137.73]) by mx.google.com with ESMTPSA id xs1sm38904455pac.7.2014.02.07.10.10.40 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Fri, 07 Feb 2014 10:10:41 -0800 (PST) From: Rodrigo Vivi To: intel-gfx@lists.freedesktop.org Date: Fri, 7 Feb 2014 16:09:47 -0200 Message-Id: <1391796588-2015-1-git-send-email-rodrigo.vivi@gmail.com> X-Mailer: git-send-email 1.7.11.7 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 1/2] drm/i915: HSW PSR fix inverted sink DP_PSR_CFG link setup. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP As pointed out by Ville we were using inverted logic here. According to spec: For link standby mode set 170h[1] = 1. For full link disabling set 170h[1] = 0. Cc: Ville Syrjälä Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i915/intel_dp.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 50381f7..4ecda72 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -1661,12 +1661,12 @@ static void intel_edp_psr_enable_sink(struct intel_dp *intel_dp) /* Enable PSR in sink */ if (intel_dp->psr_dpcd[1] & DP_PSR_NO_TRAIN_ON_EXIT) intel_dp_aux_native_write_1(intel_dp, DP_PSR_EN_CFG, - DP_PSR_ENABLE & - ~DP_PSR_MAIN_LINK_ACTIVE); - else - intel_dp_aux_native_write_1(intel_dp, DP_PSR_EN_CFG, DP_PSR_ENABLE | DP_PSR_MAIN_LINK_ACTIVE); + else + intel_dp_aux_native_write_1(intel_dp, DP_PSR_EN_CFG, + DP_PSR_ENABLE & + ~DP_PSR_MAIN_LINK_ACTIVE); /* Setup AUX registers */ I915_WRITE(EDP_PSR_AUX_DATA1(dev), EDP_PSR_DPCD_COMMAND);