From patchwork Thu Feb 20 12:37:23 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sharma, Shashank" X-Patchwork-Id: 3686791 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 4C2259F2EC for ; Thu, 20 Feb 2014 12:34:50 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6D8BF201B6 for ; Thu, 20 Feb 2014 12:34:49 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 73B6A20170 for ; Thu, 20 Feb 2014 12:34:48 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4E99AFB239; Thu, 20 Feb 2014 04:34:46 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id B0D13FB239 for ; Thu, 20 Feb 2014 04:34:43 -0800 (PST) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga102.jf.intel.com with ESMTP; 20 Feb 2014 04:30:23 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.97,512,1389772800"; d="scan'208";a="486539053" Received: from shashanks-desktop.iind.intel.com ([10.223.25.92]) by orsmga002.jf.intel.com with ESMTP; 20 Feb 2014 04:34:41 -0800 From: Shashank Sharma To: intel-gfx@lists.freedesktop.org Date: Thu, 20 Feb 2014 18:07:23 +0530 Message-Id: <1392899847-2641-3-git-send-email-shashank.sharma@intel.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1392899847-2641-1-git-send-email-shashank.sharma@intel.com> References: <1392899847-2641-1-git-send-email-shashank.sharma@intel.com> Cc: uma.shankar@intel.com Subject: [Intel-gfx] [PATCH 2/6] drm/i915: Color Manager: Add CSC color correction X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch is first extension to color manager framework. It adds implementataion of color manager property CSC correction (wide gamute) in intel color manager framework. Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_clrmgr.c | 117 +++++++++++++++++++++++++++++++++-- 1 file changed, 112 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_clrmgr.c b/drivers/gpu/drm/i915/intel_clrmgr.c index 2c826f3..363e3e6 100644 --- a/drivers/gpu/drm/i915/intel_clrmgr.c +++ b/drivers/gpu/drm/i915/intel_clrmgr.c @@ -146,11 +146,6 @@ static bool intel_clrmgr_disable_gamma(struct drm_device *dev, int identifier) { return true; } - -static void intel_clrmgr_disable_csc(struct drm_device *dev, int identifier) -{ -} - static bool intel_clrmgr_enable_hs(struct drm_device *dev, int identifier) { return true; @@ -165,8 +160,120 @@ static bool intel_clrmgr_enable_gamma(struct drm_device *dev, int identifier) return true; } +/* +* intel_disable_csc +* Disable color space conversion on PIPE +* idenifier is pipe identifier +*/ +void +intel_disable_csc(struct drm_device *dev, int identifier) +{ + u32 pipeconf = 0; + struct drm_i915_private *dev_priv = dev->dev_private; + + if (_validate_pipe(identifier)) + return; + + /* Disable CSC on PIPE */ + pipeconf = I915_READ(PIPECONF(identifier)); + pipeconf &= ~(PIPECONF_CSC_ENABLE); + I915_WRITE(PIPECONF(identifier), pipeconf); + POSTING_READ(PIPECONF(identifier)); + + DRM_DEBUG_DRIVER("CSC disabled on PIPE %c\n", + identifier == pipe_a ? 'A' : 'B'); + + return; +} + +/* +* intel_clrmgr_disable_csc +* Disable property CSC +* identifier = pipe identifier +*/ +static void intel_clrmgr_disable_csc(struct drm_device *dev, int identifier) +{ + drm_i915_private_t *dev_priv = dev->dev_private; + struct clrmgr_pipe_status *pstatus = dev_priv->clrmgr_status.pstatus; + + if (!pstatus) { + DRM_ERROR("Clrmgr: color manager not initialized"); + return; + } + + intel_disable_csc(dev, identifier); + pstatus->csc_enabled = false; + DRM_DEBUG_DRIVER("Clrmgr: CSC disabled\n"); +} + +/* +* intel_enable_csc +* Enable color space conversion on PIPE +* data is correction values to be written +* identifier is pipe identifier +*/ +int +intel_enable_csc(struct drm_device *dev, u32 *data, int identifier) +{ + int count = 0; + int pipe = 0; + u32 csc_reg = 0; + u32 pipeconf = 0; + struct drm_i915_private *dev_priv = dev->dev_private; + + if (!data) { + DRM_ERROR("NULL input to enable CSC"); + return -EINVAL; + } + + if (identifier != pipe_a) { + DRM_ERROR("CSC is supported on PIPEA only for now"); + return -EINVAL; + } + + pipeconf = I915_READ(PIPECONF(identifier)); + pipeconf |= PIPECONF_CSC_ENABLE; + csc_reg = PIPECSC(identifier); + + /* Enable csc correction */ + I915_WRITE(PIPECONF(identifier), pipeconf); + POSTING_READ(PIPECONF(identifier)); + + /* Write csc coeff to csc regs */ + while (count < CSC_MAX_COEFF_COUNT) { + I915_WRITE(csc_reg + (4 * count), ((u32 *)data)[count]); + count++; + } + + DRM_DEBUG_DRIVER("CSC enabled on PIPE %c\n", + pipe == pipe_a ? 'A' : 'B'); + + return 0; +} + +/* +* intel_clrmgr_enable_csc +* Enable property CSC +* identifier = pipe identifier +*/ static bool intel_clrmgr_enable_csc(struct drm_device *dev, int identifier) { + drm_i915_private_t *dev_priv = dev->dev_private; + struct clrmgr_pipe_status *pstatus = dev_priv->clrmgr_status.pstatus; + + if (!pstatus) { + DRM_ERROR("Clrmgr: color manager not initialized"); + return false; + } + + if (intel_enable_csc(dev, clrmgr_luts[clrmgr_csc], + identifier)) { + DRM_ERROR("Clrmgr: Enable CSC failed"); + return false; + } + + pstatus->csc_enabled = true; + DRM_DEBUG_DRIVER("Clrmgr: CSC Enabled"); return true; }