diff mbox

[1/2] drm/i915: Add a partial instruction shootdown workaround on Broadwell.

Message ID 1393487971-739-1-git-send-email-kenneth@whitecape.org (mailing list archive)
State New, archived
Headers show

Commit Message

Kenneth Graunke Feb. 27, 2014, 7:59 a.m. UTC
I believe this will be necessary on production hardware.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
---
 drivers/gpu/drm/i915/i915_reg.h | 3 +++
 drivers/gpu/drm/i915/intel_pm.c | 4 ++++
 2 files changed, 7 insertions(+)

I just realized tonight that my workarounds series never got merged.

After reviewing Ben and Chris's comments, I agree with all of them, so
I've dropped the unnecessary patches.  I also believe I shouldn't need
the pre-production workarounds I sent last time, so I've dropped those.

These two should apply to production hardware, so we probably want them.

Comments

Ville Syrjälä Feb. 27, 2014, 8:43 a.m. UTC | #1
On Wed, Feb 26, 2014 at 11:59:30PM -0800, Kenneth Graunke wrote:
> I believe this will be necessary on production hardware.
> 
> Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
> ---
>  drivers/gpu/drm/i915/i915_reg.h | 3 +++
>  drivers/gpu/drm/i915/intel_pm.c | 4 ++++
>  2 files changed, 7 insertions(+)
> 
> I just realized tonight that my workarounds series never got merged.
> 
> After reviewing Ben and Chris's comments, I agree with all of them, so
> I've dropped the unnecessary patches.  I also believe I shouldn't need
> the pre-production workarounds I sent last time, so I've dropped those.
> 
> These two should apply to production hardware, so we probably want them.
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index ad75ff7..f36d5e0 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -5050,6 +5050,9 @@
>  #define   GEN7_SINGLE_SUBSCAN_DISPATCH_ENABLE	(1<<10)
>  #define   GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE	(1<<3)
>  
> +#define GEN8_ROW_CHICKEN		0xe4f0
> +#define   PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE	(1<<8)
> +
>  #define GEN7_ROW_CHICKEN2		0xe4f4
>  #define GEN7_ROW_CHICKEN2_GT2		0xf4f4
>  #define   DOP_CLOCK_GATING_DISABLE	(1<<0)
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 4f01b04..df8ad21 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4838,6 +4838,10 @@ static void gen8_init_clock_gating(struct drm_device *dev)
>  	/* FIXME(BDW): Check all the w/a, some might only apply to
>  	 * pre-production hw. */
>  
> +	/* WaDisablePartialInstShootdown */

+:bdw

Apart from that:
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> +	I915_WRITE(GEN8_ROW_CHICKEN,
> +	           _MASKED_BIT_ENABLE(PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE));
> +
>  	/*
>  	 * This GEN8_CENTROID_PIXEL_OPT_DIS W/A is only needed for
>  	 * pre-production hardware
> -- 
> 1.8.4.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Ben Widawsky Feb. 28, 2014, 12:05 a.m. UTC | #2
On Thu, Feb 27, 2014 at 10:43:24AM +0200, Ville Syrjälä wrote:
> On Wed, Feb 26, 2014 at 11:59:30PM -0800, Kenneth Graunke wrote:
> > I believe this will be necessary on production hardware.
> > 
> > Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
> > ---
> >  drivers/gpu/drm/i915/i915_reg.h | 3 +++
> >  drivers/gpu/drm/i915/intel_pm.c | 4 ++++
> >  2 files changed, 7 insertions(+)
> > 
> > I just realized tonight that my workarounds series never got merged.
> > 
> > After reviewing Ben and Chris's comments, I agree with all of them, so
> > I've dropped the unnecessary patches.  I also believe I shouldn't need
> > the pre-production workarounds I sent last time, so I've dropped those.
> > 
> > These two should apply to production hardware, so we probably want them.
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index ad75ff7..f36d5e0 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -5050,6 +5050,9 @@
> >  #define   GEN7_SINGLE_SUBSCAN_DISPATCH_ENABLE	(1<<10)
> >  #define   GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE	(1<<3)
> >  
> > +#define GEN8_ROW_CHICKEN		0xe4f0
> > +#define   PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE	(1<<8)
> > +
> >  #define GEN7_ROW_CHICKEN2		0xe4f4
> >  #define GEN7_ROW_CHICKEN2_GT2		0xf4f4
> >  #define   DOP_CLOCK_GATING_DISABLE	(1<<0)
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 4f01b04..df8ad21 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -4838,6 +4838,10 @@ static void gen8_init_clock_gating(struct drm_device *dev)
> >  	/* FIXME(BDW): Check all the w/a, some might only apply to
> >  	 * pre-production hw. */
> >  
> > +	/* WaDisablePartialInstShootdown */
> 
> +:bdw
> 
> Apart from that:
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 

I think they're both stable material.
And:
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Daniel Vetter March 5, 2014, 2:48 p.m. UTC | #3
On Thu, Feb 27, 2014 at 04:05:04PM -0800, Ben Widawsky wrote:
> On Thu, Feb 27, 2014 at 10:43:24AM +0200, Ville Syrjälä wrote:
> > On Wed, Feb 26, 2014 at 11:59:30PM -0800, Kenneth Graunke wrote:
> > > I believe this will be necessary on production hardware.
> > > 
> > > Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
> > > ---
> > >  drivers/gpu/drm/i915/i915_reg.h | 3 +++
> > >  drivers/gpu/drm/i915/intel_pm.c | 4 ++++
> > >  2 files changed, 7 insertions(+)
> > > 
> > > I just realized tonight that my workarounds series never got merged.
> > > 
> > > After reviewing Ben and Chris's comments, I agree with all of them, so
> > > I've dropped the unnecessary patches.  I also believe I shouldn't need
> > > the pre-production workarounds I sent last time, so I've dropped those.
> > > 
> > > These two should apply to production hardware, so we probably want them.
> > > 
> > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > > index ad75ff7..f36d5e0 100644
> > > --- a/drivers/gpu/drm/i915/i915_reg.h
> > > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > > @@ -5050,6 +5050,9 @@
> > >  #define   GEN7_SINGLE_SUBSCAN_DISPATCH_ENABLE	(1<<10)
> > >  #define   GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE	(1<<3)
> > >  
> > > +#define GEN8_ROW_CHICKEN		0xe4f0
> > > +#define   PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE	(1<<8)
> > > +
> > >  #define GEN7_ROW_CHICKEN2		0xe4f4
> > >  #define GEN7_ROW_CHICKEN2_GT2		0xf4f4
> > >  #define   DOP_CLOCK_GATING_DISABLE	(1<<0)
> > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > > index 4f01b04..df8ad21 100644
> > > --- a/drivers/gpu/drm/i915/intel_pm.c
> > > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > > @@ -4838,6 +4838,10 @@ static void gen8_init_clock_gating(struct drm_device *dev)
> > >  	/* FIXME(BDW): Check all the w/a, some might only apply to
> > >  	 * pre-production hw. */
> > >  
> > > +	/* WaDisablePartialInstShootdown */

out of curiousity: Does ROW_CHICKEN survive a gpu reset? We've had fun
with this kind of stuff before ...

> > 
> > +:bdw
> > 
> > Apart from that:
> > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> 
> I think they're both stable material.
> And:
> Reviewed-by: Ben Widawsky <ben@bwidawsk.net>

Both merged to dinq. bdw in 3.13 is prelim, so would only need to go into
3.14-fixes. But there's too much bdw fixes floating (iirc 10 patches) that
some time to settle everything looks like the right approach.

I guess as the platform owner you're then signed up to assemeble a
backports branch for 3.14-bdw.
-Daniel
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index ad75ff7..f36d5e0 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5050,6 +5050,9 @@ 
 #define   GEN7_SINGLE_SUBSCAN_DISPATCH_ENABLE	(1<<10)
 #define   GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE	(1<<3)
 
+#define GEN8_ROW_CHICKEN		0xe4f0
+#define   PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE	(1<<8)
+
 #define GEN7_ROW_CHICKEN2		0xe4f4
 #define GEN7_ROW_CHICKEN2_GT2		0xf4f4
 #define   DOP_CLOCK_GATING_DISABLE	(1<<0)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 4f01b04..df8ad21 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4838,6 +4838,10 @@  static void gen8_init_clock_gating(struct drm_device *dev)
 	/* FIXME(BDW): Check all the w/a, some might only apply to
 	 * pre-production hw. */
 
+	/* WaDisablePartialInstShootdown */
+	I915_WRITE(GEN8_ROW_CHICKEN,
+	           _MASKED_BIT_ENABLE(PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE));
+
 	/*
 	 * This GEN8_CENTROID_PIXEL_OPT_DIS W/A is only needed for
 	 * pre-production hardware