| Message ID | 1393540010-1582-20-git-send-email-przanoni@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Thu, 27 Feb 2014 19:26:46 -0300 Paulo Zanoni <przanoni@gmail.com> wrote: > From: Paulo Zanoni <paulo.r.zanoni@intel.com> > > When other platforms add runtime PM support they will also need to > disable interrupts, so move the variable to the runtime PM struct. > > v2: - Rebase. > v3: - Rebase. > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> > --- > drivers/gpu/drm/i915/i915_debugfs.c | 2 +- > drivers/gpu/drm/i915/i915_drv.h | 10 +++---- > drivers/gpu/drm/i915/i915_gem.c | 2 +- > drivers/gpu/drm/i915/i915_irq.c | 58 ++++++++++++++++++------------------ > drivers/gpu/drm/i915/intel_display.c | 4 +-- > drivers/gpu/drm/i915/intel_drv.h | 4 +-- > drivers/gpu/drm/i915/intel_pm.c | 3 +- > 7 files changed, 42 insertions(+), 41 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c > index 93d6065..213b093 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -1999,7 +1999,7 @@ static int i915_pc8_status(struct seq_file *m, void *unused) > mutex_lock(&dev_priv->pc8.lock); > seq_printf(m, "GPU idle: %s\n", yesno(!dev_priv->mm.busy)); > seq_printf(m, "IRQs disabled: %s\n", > - yesno(dev_priv->pc8.irqs_disabled)); > + yesno(dev_priv->pm.irqs_disabled)); > mutex_unlock(&dev_priv->pc8.lock); > > return 0; > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 16e344e..74fba1c 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -1350,8 +1350,12 @@ struct ilk_wm_values { > * For more, read "Display Sequences for Package C8" on our documentation. > */ > struct i915_package_c8 { > - bool irqs_disabled; > struct mutex lock; > +}; > + > +struct i915_runtime_pm { > + bool suspended; > + bool irqs_disabled; > > struct { > uint32_t deimr; > @@ -1362,10 +1366,6 @@ struct i915_package_c8 { > } regsave; > }; > > -struct i915_runtime_pm { > - bool suspended; > -}; > - > enum intel_pipe_crc_source { > INTEL_PIPE_CRC_SOURCE_NONE, > INTEL_PIPE_CRC_SOURCE_PLANE1, > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c > index 6978e69..998dabe 100644 > --- a/drivers/gpu/drm/i915/i915_gem.c > +++ b/drivers/gpu/drm/i915/i915_gem.c > @@ -1017,7 +1017,7 @@ static int __wait_seqno(struct intel_ring_buffer *ring, u32 seqno, > unsigned long timeout_expire; > int ret; > > - WARN(dev_priv->pc8.irqs_disabled, "IRQs disabled\n"); > + WARN(dev_priv->pm.irqs_disabled, "IRQs disabled\n"); > > if (i915_seqno_passed(ring->get_seqno(ring, true), seqno)) > return 0; > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > index f68aee3..14b26f2 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -86,9 +86,9 @@ ironlake_enable_display_irq(drm_i915_private_t *dev_priv, u32 mask) > { > assert_spin_locked(&dev_priv->irq_lock); > > - if (dev_priv->pc8.irqs_disabled) { > + if (dev_priv->pm.irqs_disabled) { > WARN(1, "IRQs disabled\n"); > - dev_priv->pc8.regsave.deimr &= ~mask; > + dev_priv->pm.regsave.deimr &= ~mask; > return; > } > > @@ -104,9 +104,9 @@ ironlake_disable_display_irq(drm_i915_private_t *dev_priv, u32 mask) > { > assert_spin_locked(&dev_priv->irq_lock); > > - if (dev_priv->pc8.irqs_disabled) { > + if (dev_priv->pm.irqs_disabled) { > WARN(1, "IRQs disabled\n"); > - dev_priv->pc8.regsave.deimr |= mask; > + dev_priv->pm.regsave.deimr |= mask; > return; > } > > @@ -129,10 +129,10 @@ static void ilk_update_gt_irq(struct drm_i915_private *dev_priv, > { > assert_spin_locked(&dev_priv->irq_lock); > > - if (dev_priv->pc8.irqs_disabled) { > + if (dev_priv->pm.irqs_disabled) { > WARN(1, "IRQs disabled\n"); > - dev_priv->pc8.regsave.gtimr &= ~interrupt_mask; > - dev_priv->pc8.regsave.gtimr |= (~enabled_irq_mask & > + dev_priv->pm.regsave.gtimr &= ~interrupt_mask; > + dev_priv->pm.regsave.gtimr |= (~enabled_irq_mask & > interrupt_mask); > return; > } > @@ -167,10 +167,10 @@ static void snb_update_pm_irq(struct drm_i915_private *dev_priv, > > assert_spin_locked(&dev_priv->irq_lock); > > - if (dev_priv->pc8.irqs_disabled) { > + if (dev_priv->pm.irqs_disabled) { > WARN(1, "IRQs disabled\n"); > - dev_priv->pc8.regsave.gen6_pmimr &= ~interrupt_mask; > - dev_priv->pc8.regsave.gen6_pmimr |= (~enabled_irq_mask & > + dev_priv->pm.regsave.gen6_pmimr &= ~interrupt_mask; > + dev_priv->pm.regsave.gen6_pmimr |= (~enabled_irq_mask & > interrupt_mask); > return; > } > @@ -313,11 +313,11 @@ static void ibx_display_interrupt_update(struct drm_i915_private *dev_priv, > > assert_spin_locked(&dev_priv->irq_lock); > > - if (dev_priv->pc8.irqs_disabled && > + if (dev_priv->pm.irqs_disabled && > (interrupt_mask & SDE_HOTPLUG_MASK_CPT)) { > WARN(1, "IRQs disabled\n"); > - dev_priv->pc8.regsave.sdeimr &= ~interrupt_mask; > - dev_priv->pc8.regsave.sdeimr |= (~enabled_irq_mask & > + dev_priv->pm.regsave.sdeimr &= ~interrupt_mask; > + dev_priv->pm.regsave.sdeimr |= (~enabled_irq_mask & > interrupt_mask); > return; > } > @@ -4016,32 +4016,32 @@ void intel_hpd_init(struct drm_device *dev) > spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); > } > > -/* Disable interrupts so we can allow Package C8+. */ > -void hsw_pc8_disable_interrupts(struct drm_device *dev) > +/* Disable interrupts so we can allow runtime PM. */ > +void hsw_runtime_pm_disable_interrupts(struct drm_device *dev) > { > struct drm_i915_private *dev_priv = dev->dev_private; > unsigned long irqflags; > > spin_lock_irqsave(&dev_priv->irq_lock, irqflags); > > - dev_priv->pc8.regsave.deimr = I915_READ(DEIMR); > - dev_priv->pc8.regsave.sdeimr = I915_READ(SDEIMR); > - dev_priv->pc8.regsave.gtimr = I915_READ(GTIMR); > - dev_priv->pc8.regsave.gtier = I915_READ(GTIER); > - dev_priv->pc8.regsave.gen6_pmimr = I915_READ(GEN6_PMIMR); > + dev_priv->pm.regsave.deimr = I915_READ(DEIMR); > + dev_priv->pm.regsave.sdeimr = I915_READ(SDEIMR); > + dev_priv->pm.regsave.gtimr = I915_READ(GTIMR); > + dev_priv->pm.regsave.gtier = I915_READ(GTIER); > + dev_priv->pm.regsave.gen6_pmimr = I915_READ(GEN6_PMIMR); > > ironlake_disable_display_irq(dev_priv, 0xffffffff); > ibx_disable_display_interrupt(dev_priv, 0xffffffff); > ilk_disable_gt_irq(dev_priv, 0xffffffff); > snb_disable_pm_irq(dev_priv, 0xffffffff); > > - dev_priv->pc8.irqs_disabled = true; > + dev_priv->pm.irqs_disabled = true; > > spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); > } > > -/* Restore interrupts so we can recover from Package C8+. */ > -void hsw_pc8_restore_interrupts(struct drm_device *dev) > +/* Restore interrupts so we can recover from runtime PM. */ > +void hsw_runtime_pm_restore_interrupts(struct drm_device *dev) > { > struct drm_i915_private *dev_priv = dev->dev_private; > unsigned long irqflags; > @@ -4061,13 +4061,13 @@ void hsw_pc8_restore_interrupts(struct drm_device *dev) > val = I915_READ(GEN6_PMIMR); > WARN(val != 0xffffffff, "GEN6_PMIMR is 0x%08x\n", val); > > - dev_priv->pc8.irqs_disabled = false; > + dev_priv->pm.irqs_disabled = false; > > - ironlake_enable_display_irq(dev_priv, ~dev_priv->pc8.regsave.deimr); > - ibx_enable_display_interrupt(dev_priv, ~dev_priv->pc8.regsave.sdeimr); > - ilk_enable_gt_irq(dev_priv, ~dev_priv->pc8.regsave.gtimr); > - snb_enable_pm_irq(dev_priv, ~dev_priv->pc8.regsave.gen6_pmimr); > - I915_WRITE(GTIER, dev_priv->pc8.regsave.gtier); > + ironlake_enable_display_irq(dev_priv, ~dev_priv->pm.regsave.deimr); > + ibx_enable_display_interrupt(dev_priv, ~dev_priv->pm.regsave.sdeimr); > + ilk_enable_gt_irq(dev_priv, ~dev_priv->pm.regsave.gtimr); > + snb_enable_pm_irq(dev_priv, ~dev_priv->pm.regsave.gen6_pmimr); > + I915_WRITE(GTIER, dev_priv->pm.regsave.gtier); > > spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); > } > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 271dd66..420fad5 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -6667,7 +6667,7 @@ void __hsw_do_enable_pc8(struct drm_i915_private *dev_priv) > } > > lpt_disable_clkout_dp(dev); > - hsw_pc8_disable_interrupts(dev); > + hsw_runtime_pm_disable_interrupts(dev); > hsw_disable_lcpll(dev_priv, true, true); > } > > @@ -6681,7 +6681,7 @@ void __hsw_do_disable_pc8(struct drm_i915_private *dev_priv) > DRM_DEBUG_KMS("Disabling package C8+\n"); > > hsw_restore_lcpll(dev_priv); > - hsw_pc8_restore_interrupts(dev); > + hsw_runtime_pm_restore_interrupts(dev); > lpt_init_pch_refclk(dev); > > if (dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) { > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h > index 2c02d68..d0434e8 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -616,8 +616,8 @@ void ilk_enable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask); > void ilk_disable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask); > void snb_enable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask); > void snb_disable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask); > -void hsw_pc8_disable_interrupts(struct drm_device *dev); > -void hsw_pc8_restore_interrupts(struct drm_device *dev); > +void hsw_runtime_pm_disable_interrupts(struct drm_device *dev); > +void hsw_runtime_pm_restore_interrupts(struct drm_device *dev); > > > /* intel_crt.c */ > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index c85507a..5ff4b59 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -5770,7 +5770,8 @@ void intel_pm_setup(struct drm_device *dev) > mutex_init(&dev_priv->rps.hw_lock); > > mutex_init(&dev_priv->pc8.lock); > - dev_priv->pc8.irqs_disabled = false; > INIT_DELAYED_WORK(&dev_priv->rps.delayed_resume_work, > intel_gen6_powersave_work); > + > + dev_priv->pm.irqs_disabled = false; > } I wonder if we should eventually not bother with saving/restoring the interrupt state and do a full re-init like we'll have to in the display power well case. But that's a separate issue really... Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2014-02-28 14:15 GMT-03:00 Jesse Barnes <jbarnes@virtuousgeek.org>: > On Thu, 27 Feb 2014 19:26:46 -0300 > Paulo Zanoni <przanoni@gmail.com> wrote: > >> From: Paulo Zanoni <paulo.r.zanoni@intel.com> >> >> When other platforms add runtime PM support they will also need to >> disable interrupts, so move the variable to the runtime PM struct. >> >> v2: - Rebase. >> v3: - Rebase. >> >> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> >> --- >> drivers/gpu/drm/i915/i915_debugfs.c | 2 +- >> drivers/gpu/drm/i915/i915_drv.h | 10 +++---- >> drivers/gpu/drm/i915/i915_gem.c | 2 +- >> drivers/gpu/drm/i915/i915_irq.c | 58 ++++++++++++++++++------------------ >> drivers/gpu/drm/i915/intel_display.c | 4 +-- >> drivers/gpu/drm/i915/intel_drv.h | 4 +-- >> drivers/gpu/drm/i915/intel_pm.c | 3 +- >> 7 files changed, 42 insertions(+), 41 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c >> index 93d6065..213b093 100644 >> --- a/drivers/gpu/drm/i915/i915_debugfs.c >> +++ b/drivers/gpu/drm/i915/i915_debugfs.c >> @@ -1999,7 +1999,7 @@ static int i915_pc8_status(struct seq_file *m, void *unused) >> mutex_lock(&dev_priv->pc8.lock); >> seq_printf(m, "GPU idle: %s\n", yesno(!dev_priv->mm.busy)); >> seq_printf(m, "IRQs disabled: %s\n", >> - yesno(dev_priv->pc8.irqs_disabled)); >> + yesno(dev_priv->pm.irqs_disabled)); >> mutex_unlock(&dev_priv->pc8.lock); >> >> return 0; >> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h >> index 16e344e..74fba1c 100644 >> --- a/drivers/gpu/drm/i915/i915_drv.h >> +++ b/drivers/gpu/drm/i915/i915_drv.h >> @@ -1350,8 +1350,12 @@ struct ilk_wm_values { >> * For more, read "Display Sequences for Package C8" on our documentation. >> */ >> struct i915_package_c8 { >> - bool irqs_disabled; >> struct mutex lock; >> +}; >> + >> +struct i915_runtime_pm { >> + bool suspended; >> + bool irqs_disabled; >> >> struct { >> uint32_t deimr; >> @@ -1362,10 +1366,6 @@ struct i915_package_c8 { >> } regsave; >> }; >> >> -struct i915_runtime_pm { >> - bool suspended; >> -}; >> - >> enum intel_pipe_crc_source { >> INTEL_PIPE_CRC_SOURCE_NONE, >> INTEL_PIPE_CRC_SOURCE_PLANE1, >> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c >> index 6978e69..998dabe 100644 >> --- a/drivers/gpu/drm/i915/i915_gem.c >> +++ b/drivers/gpu/drm/i915/i915_gem.c >> @@ -1017,7 +1017,7 @@ static int __wait_seqno(struct intel_ring_buffer *ring, u32 seqno, >> unsigned long timeout_expire; >> int ret; >> >> - WARN(dev_priv->pc8.irqs_disabled, "IRQs disabled\n"); >> + WARN(dev_priv->pm.irqs_disabled, "IRQs disabled\n"); >> >> if (i915_seqno_passed(ring->get_seqno(ring, true), seqno)) >> return 0; >> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c >> index f68aee3..14b26f2 100644 >> --- a/drivers/gpu/drm/i915/i915_irq.c >> +++ b/drivers/gpu/drm/i915/i915_irq.c >> @@ -86,9 +86,9 @@ ironlake_enable_display_irq(drm_i915_private_t *dev_priv, u32 mask) >> { >> assert_spin_locked(&dev_priv->irq_lock); >> >> - if (dev_priv->pc8.irqs_disabled) { >> + if (dev_priv->pm.irqs_disabled) { >> WARN(1, "IRQs disabled\n"); >> - dev_priv->pc8.regsave.deimr &= ~mask; >> + dev_priv->pm.regsave.deimr &= ~mask; >> return; >> } >> >> @@ -104,9 +104,9 @@ ironlake_disable_display_irq(drm_i915_private_t *dev_priv, u32 mask) >> { >> assert_spin_locked(&dev_priv->irq_lock); >> >> - if (dev_priv->pc8.irqs_disabled) { >> + if (dev_priv->pm.irqs_disabled) { >> WARN(1, "IRQs disabled\n"); >> - dev_priv->pc8.regsave.deimr |= mask; >> + dev_priv->pm.regsave.deimr |= mask; >> return; >> } >> >> @@ -129,10 +129,10 @@ static void ilk_update_gt_irq(struct drm_i915_private *dev_priv, >> { >> assert_spin_locked(&dev_priv->irq_lock); >> >> - if (dev_priv->pc8.irqs_disabled) { >> + if (dev_priv->pm.irqs_disabled) { >> WARN(1, "IRQs disabled\n"); >> - dev_priv->pc8.regsave.gtimr &= ~interrupt_mask; >> - dev_priv->pc8.regsave.gtimr |= (~enabled_irq_mask & >> + dev_priv->pm.regsave.gtimr &= ~interrupt_mask; >> + dev_priv->pm.regsave.gtimr |= (~enabled_irq_mask & >> interrupt_mask); >> return; >> } >> @@ -167,10 +167,10 @@ static void snb_update_pm_irq(struct drm_i915_private *dev_priv, >> >> assert_spin_locked(&dev_priv->irq_lock); >> >> - if (dev_priv->pc8.irqs_disabled) { >> + if (dev_priv->pm.irqs_disabled) { >> WARN(1, "IRQs disabled\n"); >> - dev_priv->pc8.regsave.gen6_pmimr &= ~interrupt_mask; >> - dev_priv->pc8.regsave.gen6_pmimr |= (~enabled_irq_mask & >> + dev_priv->pm.regsave.gen6_pmimr &= ~interrupt_mask; >> + dev_priv->pm.regsave.gen6_pmimr |= (~enabled_irq_mask & >> interrupt_mask); >> return; >> } >> @@ -313,11 +313,11 @@ static void ibx_display_interrupt_update(struct drm_i915_private *dev_priv, >> >> assert_spin_locked(&dev_priv->irq_lock); >> >> - if (dev_priv->pc8.irqs_disabled && >> + if (dev_priv->pm.irqs_disabled && >> (interrupt_mask & SDE_HOTPLUG_MASK_CPT)) { >> WARN(1, "IRQs disabled\n"); >> - dev_priv->pc8.regsave.sdeimr &= ~interrupt_mask; >> - dev_priv->pc8.regsave.sdeimr |= (~enabled_irq_mask & >> + dev_priv->pm.regsave.sdeimr &= ~interrupt_mask; >> + dev_priv->pm.regsave.sdeimr |= (~enabled_irq_mask & >> interrupt_mask); >> return; >> } >> @@ -4016,32 +4016,32 @@ void intel_hpd_init(struct drm_device *dev) >> spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); >> } >> >> -/* Disable interrupts so we can allow Package C8+. */ >> -void hsw_pc8_disable_interrupts(struct drm_device *dev) >> +/* Disable interrupts so we can allow runtime PM. */ >> +void hsw_runtime_pm_disable_interrupts(struct drm_device *dev) >> { >> struct drm_i915_private *dev_priv = dev->dev_private; >> unsigned long irqflags; >> >> spin_lock_irqsave(&dev_priv->irq_lock, irqflags); >> >> - dev_priv->pc8.regsave.deimr = I915_READ(DEIMR); >> - dev_priv->pc8.regsave.sdeimr = I915_READ(SDEIMR); >> - dev_priv->pc8.regsave.gtimr = I915_READ(GTIMR); >> - dev_priv->pc8.regsave.gtier = I915_READ(GTIER); >> - dev_priv->pc8.regsave.gen6_pmimr = I915_READ(GEN6_PMIMR); >> + dev_priv->pm.regsave.deimr = I915_READ(DEIMR); >> + dev_priv->pm.regsave.sdeimr = I915_READ(SDEIMR); >> + dev_priv->pm.regsave.gtimr = I915_READ(GTIMR); >> + dev_priv->pm.regsave.gtier = I915_READ(GTIER); >> + dev_priv->pm.regsave.gen6_pmimr = I915_READ(GEN6_PMIMR); >> >> ironlake_disable_display_irq(dev_priv, 0xffffffff); >> ibx_disable_display_interrupt(dev_priv, 0xffffffff); >> ilk_disable_gt_irq(dev_priv, 0xffffffff); >> snb_disable_pm_irq(dev_priv, 0xffffffff); >> >> - dev_priv->pc8.irqs_disabled = true; >> + dev_priv->pm.irqs_disabled = true; >> >> spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); >> } >> >> -/* Restore interrupts so we can recover from Package C8+. */ >> -void hsw_pc8_restore_interrupts(struct drm_device *dev) >> +/* Restore interrupts so we can recover from runtime PM. */ >> +void hsw_runtime_pm_restore_interrupts(struct drm_device *dev) >> { >> struct drm_i915_private *dev_priv = dev->dev_private; >> unsigned long irqflags; >> @@ -4061,13 +4061,13 @@ void hsw_pc8_restore_interrupts(struct drm_device *dev) >> val = I915_READ(GEN6_PMIMR); >> WARN(val != 0xffffffff, "GEN6_PMIMR is 0x%08x\n", val); >> >> - dev_priv->pc8.irqs_disabled = false; >> + dev_priv->pm.irqs_disabled = false; >> >> - ironlake_enable_display_irq(dev_priv, ~dev_priv->pc8.regsave.deimr); >> - ibx_enable_display_interrupt(dev_priv, ~dev_priv->pc8.regsave.sdeimr); >> - ilk_enable_gt_irq(dev_priv, ~dev_priv->pc8.regsave.gtimr); >> - snb_enable_pm_irq(dev_priv, ~dev_priv->pc8.regsave.gen6_pmimr); >> - I915_WRITE(GTIER, dev_priv->pc8.regsave.gtier); >> + ironlake_enable_display_irq(dev_priv, ~dev_priv->pm.regsave.deimr); >> + ibx_enable_display_interrupt(dev_priv, ~dev_priv->pm.regsave.sdeimr); >> + ilk_enable_gt_irq(dev_priv, ~dev_priv->pm.regsave.gtimr); >> + snb_enable_pm_irq(dev_priv, ~dev_priv->pm.regsave.gen6_pmimr); >> + I915_WRITE(GTIER, dev_priv->pm.regsave.gtier); >> >> spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); >> } >> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c >> index 271dd66..420fad5 100644 >> --- a/drivers/gpu/drm/i915/intel_display.c >> +++ b/drivers/gpu/drm/i915/intel_display.c >> @@ -6667,7 +6667,7 @@ void __hsw_do_enable_pc8(struct drm_i915_private *dev_priv) >> } >> >> lpt_disable_clkout_dp(dev); >> - hsw_pc8_disable_interrupts(dev); >> + hsw_runtime_pm_disable_interrupts(dev); >> hsw_disable_lcpll(dev_priv, true, true); >> } >> >> @@ -6681,7 +6681,7 @@ void __hsw_do_disable_pc8(struct drm_i915_private *dev_priv) >> DRM_DEBUG_KMS("Disabling package C8+\n"); >> >> hsw_restore_lcpll(dev_priv); >> - hsw_pc8_restore_interrupts(dev); >> + hsw_runtime_pm_restore_interrupts(dev); >> lpt_init_pch_refclk(dev); >> >> if (dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) { >> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h >> index 2c02d68..d0434e8 100644 >> --- a/drivers/gpu/drm/i915/intel_drv.h >> +++ b/drivers/gpu/drm/i915/intel_drv.h >> @@ -616,8 +616,8 @@ void ilk_enable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask); >> void ilk_disable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask); >> void snb_enable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask); >> void snb_disable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask); >> -void hsw_pc8_disable_interrupts(struct drm_device *dev); >> -void hsw_pc8_restore_interrupts(struct drm_device *dev); >> +void hsw_runtime_pm_disable_interrupts(struct drm_device *dev); >> +void hsw_runtime_pm_restore_interrupts(struct drm_device *dev); >> >> >> /* intel_crt.c */ >> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c >> index c85507a..5ff4b59 100644 >> --- a/drivers/gpu/drm/i915/intel_pm.c >> +++ b/drivers/gpu/drm/i915/intel_pm.c >> @@ -5770,7 +5770,8 @@ void intel_pm_setup(struct drm_device *dev) >> mutex_init(&dev_priv->rps.hw_lock); >> >> mutex_init(&dev_priv->pc8.lock); >> - dev_priv->pc8.irqs_disabled = false; >> INIT_DELAYED_WORK(&dev_priv->rps.delayed_resume_work, >> intel_gen6_powersave_work); >> + >> + dev_priv->pm.irqs_disabled = false; >> } > > I wonder if we should eventually not bother with saving/restoring the > interrupt state and do a full re-init like we'll have to in the display > power well case. But that's a separate issue really... That's the plan. See this: http://cgit.freedesktop.org/~pzanoni/linux/commit/?h=bdw-runtime-pm-2014-02-26&id=843563a642b5471053cb86f631872e02b27de45d > > Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> > > -- > Jesse Barnes, Intel Open Source Technology Center
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 93d6065..213b093 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -1999,7 +1999,7 @@ static int i915_pc8_status(struct seq_file *m, void *unused) mutex_lock(&dev_priv->pc8.lock); seq_printf(m, "GPU idle: %s\n", yesno(!dev_priv->mm.busy)); seq_printf(m, "IRQs disabled: %s\n", - yesno(dev_priv->pc8.irqs_disabled)); + yesno(dev_priv->pm.irqs_disabled)); mutex_unlock(&dev_priv->pc8.lock); return 0; diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 16e344e..74fba1c 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1350,8 +1350,12 @@ struct ilk_wm_values { * For more, read "Display Sequences for Package C8" on our documentation. */ struct i915_package_c8 { - bool irqs_disabled; struct mutex lock; +}; + +struct i915_runtime_pm { + bool suspended; + bool irqs_disabled; struct { uint32_t deimr; @@ -1362,10 +1366,6 @@ struct i915_package_c8 { } regsave; }; -struct i915_runtime_pm { - bool suspended; -}; - enum intel_pipe_crc_source { INTEL_PIPE_CRC_SOURCE_NONE, INTEL_PIPE_CRC_SOURCE_PLANE1, diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 6978e69..998dabe 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -1017,7 +1017,7 @@ static int __wait_seqno(struct intel_ring_buffer *ring, u32 seqno, unsigned long timeout_expire; int ret; - WARN(dev_priv->pc8.irqs_disabled, "IRQs disabled\n"); + WARN(dev_priv->pm.irqs_disabled, "IRQs disabled\n"); if (i915_seqno_passed(ring->get_seqno(ring, true), seqno)) return 0; diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index f68aee3..14b26f2 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -86,9 +86,9 @@ ironlake_enable_display_irq(drm_i915_private_t *dev_priv, u32 mask) { assert_spin_locked(&dev_priv->irq_lock); - if (dev_priv->pc8.irqs_disabled) { + if (dev_priv->pm.irqs_disabled) { WARN(1, "IRQs disabled\n"); - dev_priv->pc8.regsave.deimr &= ~mask; + dev_priv->pm.regsave.deimr &= ~mask; return; } @@ -104,9 +104,9 @@ ironlake_disable_display_irq(drm_i915_private_t *dev_priv, u32 mask) { assert_spin_locked(&dev_priv->irq_lock); - if (dev_priv->pc8.irqs_disabled) { + if (dev_priv->pm.irqs_disabled) { WARN(1, "IRQs disabled\n"); - dev_priv->pc8.regsave.deimr |= mask; + dev_priv->pm.regsave.deimr |= mask; return; } @@ -129,10 +129,10 @@ static void ilk_update_gt_irq(struct drm_i915_private *dev_priv, { assert_spin_locked(&dev_priv->irq_lock); - if (dev_priv->pc8.irqs_disabled) { + if (dev_priv->pm.irqs_disabled) { WARN(1, "IRQs disabled\n"); - dev_priv->pc8.regsave.gtimr &= ~interrupt_mask; - dev_priv->pc8.regsave.gtimr |= (~enabled_irq_mask & + dev_priv->pm.regsave.gtimr &= ~interrupt_mask; + dev_priv->pm.regsave.gtimr |= (~enabled_irq_mask & interrupt_mask); return; } @@ -167,10 +167,10 @@ static void snb_update_pm_irq(struct drm_i915_private *dev_priv, assert_spin_locked(&dev_priv->irq_lock); - if (dev_priv->pc8.irqs_disabled) { + if (dev_priv->pm.irqs_disabled) { WARN(1, "IRQs disabled\n"); - dev_priv->pc8.regsave.gen6_pmimr &= ~interrupt_mask; - dev_priv->pc8.regsave.gen6_pmimr |= (~enabled_irq_mask & + dev_priv->pm.regsave.gen6_pmimr &= ~interrupt_mask; + dev_priv->pm.regsave.gen6_pmimr |= (~enabled_irq_mask & interrupt_mask); return; } @@ -313,11 +313,11 @@ static void ibx_display_interrupt_update(struct drm_i915_private *dev_priv, assert_spin_locked(&dev_priv->irq_lock); - if (dev_priv->pc8.irqs_disabled && + if (dev_priv->pm.irqs_disabled && (interrupt_mask & SDE_HOTPLUG_MASK_CPT)) { WARN(1, "IRQs disabled\n"); - dev_priv->pc8.regsave.sdeimr &= ~interrupt_mask; - dev_priv->pc8.regsave.sdeimr |= (~enabled_irq_mask & + dev_priv->pm.regsave.sdeimr &= ~interrupt_mask; + dev_priv->pm.regsave.sdeimr |= (~enabled_irq_mask & interrupt_mask); return; } @@ -4016,32 +4016,32 @@ void intel_hpd_init(struct drm_device *dev) spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); } -/* Disable interrupts so we can allow Package C8+. */ -void hsw_pc8_disable_interrupts(struct drm_device *dev) +/* Disable interrupts so we can allow runtime PM. */ +void hsw_runtime_pm_disable_interrupts(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; unsigned long irqflags; spin_lock_irqsave(&dev_priv->irq_lock, irqflags); - dev_priv->pc8.regsave.deimr = I915_READ(DEIMR); - dev_priv->pc8.regsave.sdeimr = I915_READ(SDEIMR); - dev_priv->pc8.regsave.gtimr = I915_READ(GTIMR); - dev_priv->pc8.regsave.gtier = I915_READ(GTIER); - dev_priv->pc8.regsave.gen6_pmimr = I915_READ(GEN6_PMIMR); + dev_priv->pm.regsave.deimr = I915_READ(DEIMR); + dev_priv->pm.regsave.sdeimr = I915_READ(SDEIMR); + dev_priv->pm.regsave.gtimr = I915_READ(GTIMR); + dev_priv->pm.regsave.gtier = I915_READ(GTIER); + dev_priv->pm.regsave.gen6_pmimr = I915_READ(GEN6_PMIMR); ironlake_disable_display_irq(dev_priv, 0xffffffff); ibx_disable_display_interrupt(dev_priv, 0xffffffff); ilk_disable_gt_irq(dev_priv, 0xffffffff); snb_disable_pm_irq(dev_priv, 0xffffffff); - dev_priv->pc8.irqs_disabled = true; + dev_priv->pm.irqs_disabled = true; spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); } -/* Restore interrupts so we can recover from Package C8+. */ -void hsw_pc8_restore_interrupts(struct drm_device *dev) +/* Restore interrupts so we can recover from runtime PM. */ +void hsw_runtime_pm_restore_interrupts(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; unsigned long irqflags; @@ -4061,13 +4061,13 @@ void hsw_pc8_restore_interrupts(struct drm_device *dev) val = I915_READ(GEN6_PMIMR); WARN(val != 0xffffffff, "GEN6_PMIMR is 0x%08x\n", val); - dev_priv->pc8.irqs_disabled = false; + dev_priv->pm.irqs_disabled = false; - ironlake_enable_display_irq(dev_priv, ~dev_priv->pc8.regsave.deimr); - ibx_enable_display_interrupt(dev_priv, ~dev_priv->pc8.regsave.sdeimr); - ilk_enable_gt_irq(dev_priv, ~dev_priv->pc8.regsave.gtimr); - snb_enable_pm_irq(dev_priv, ~dev_priv->pc8.regsave.gen6_pmimr); - I915_WRITE(GTIER, dev_priv->pc8.regsave.gtier); + ironlake_enable_display_irq(dev_priv, ~dev_priv->pm.regsave.deimr); + ibx_enable_display_interrupt(dev_priv, ~dev_priv->pm.regsave.sdeimr); + ilk_enable_gt_irq(dev_priv, ~dev_priv->pm.regsave.gtimr); + snb_enable_pm_irq(dev_priv, ~dev_priv->pm.regsave.gen6_pmimr); + I915_WRITE(GTIER, dev_priv->pm.regsave.gtier); spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); } diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 271dd66..420fad5 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -6667,7 +6667,7 @@ void __hsw_do_enable_pc8(struct drm_i915_private *dev_priv) } lpt_disable_clkout_dp(dev); - hsw_pc8_disable_interrupts(dev); + hsw_runtime_pm_disable_interrupts(dev); hsw_disable_lcpll(dev_priv, true, true); } @@ -6681,7 +6681,7 @@ void __hsw_do_disable_pc8(struct drm_i915_private *dev_priv) DRM_DEBUG_KMS("Disabling package C8+\n"); hsw_restore_lcpll(dev_priv); - hsw_pc8_restore_interrupts(dev); + hsw_runtime_pm_restore_interrupts(dev); lpt_init_pch_refclk(dev); if (dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) { diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 2c02d68..d0434e8 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -616,8 +616,8 @@ void ilk_enable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask); void ilk_disable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask); void snb_enable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask); void snb_disable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask); -void hsw_pc8_disable_interrupts(struct drm_device *dev); -void hsw_pc8_restore_interrupts(struct drm_device *dev); +void hsw_runtime_pm_disable_interrupts(struct drm_device *dev); +void hsw_runtime_pm_restore_interrupts(struct drm_device *dev); /* intel_crt.c */ diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index c85507a..5ff4b59 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -5770,7 +5770,8 @@ void intel_pm_setup(struct drm_device *dev) mutex_init(&dev_priv->rps.hw_lock); mutex_init(&dev_priv->pc8.lock); - dev_priv->pc8.irqs_disabled = false; INIT_DELAYED_WORK(&dev_priv->rps.delayed_resume_work, intel_gen6_powersave_work); + + dev_priv->pm.irqs_disabled = false; }