| Message ID | 1394211475-2646-6-git-send-email-jbarnes@virtuousgeek.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Fri, Mar 07, 2014 at 08:57:53AM -0800, Jesse Barnes wrote: > As of IVB, the memory controller does internal swizzling already, so we > shouldn't need to enable these. Based on an earlier fix from Kristian. > > Reported-by: Kristian Høgsberg <hoegsberg@gmail.com> > Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Imo the right approach here is to check whether any of the preserved/inherited framebuffers has tiling enabled, and if so we need to preserve the swizzling mode the bios has set. Also this should be done on gen6+ since those are the machines where swizzling can be changed. -Daniel > --- > drivers/gpu/drm/i915/i915_gem.c | 7 +++---- > drivers/gpu/drm/i915/i915_gem_tiling.c | 2 +- > 2 files changed, 4 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c > index 18ea6bc..dcf4b01 100644 > --- a/drivers/gpu/drm/i915/i915_gem.c > +++ b/drivers/gpu/drm/i915/i915_gem.c > @@ -4296,6 +4296,9 @@ void i915_gem_init_swizzling(struct drm_device *dev) > dev_priv->mm.bit_6_swizzle_x == I915_BIT_6_SWIZZLE_NONE) > return; > > + if (INTEL_INFO(dev)->gen >= 7) > + return; > + > I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) | > DISP_TILE_SURFACE_SWIZZLING); > > @@ -4305,10 +4308,6 @@ void i915_gem_init_swizzling(struct drm_device *dev) > I915_WRITE(TILECTL, I915_READ(TILECTL) | TILECTL_SWZCTL); > if (IS_GEN6(dev)) > I915_WRITE(ARB_MODE, _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_SNB)); > - else if (IS_GEN7(dev)) > - I915_WRITE(ARB_MODE, _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_IVB)); > - else if (IS_GEN8(dev)) > - I915_WRITE(GAMTARBMODE, _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_BDW)); > else > BUG(); > } > diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c > index eb99358..05c5d98 100644 > --- a/drivers/gpu/drm/i915/i915_gem_tiling.c > +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c > @@ -91,7 +91,7 @@ i915_gem_detect_bit_6_swizzle(struct drm_device *dev) > uint32_t swizzle_x = I915_BIT_6_SWIZZLE_UNKNOWN; > uint32_t swizzle_y = I915_BIT_6_SWIZZLE_UNKNOWN; > > - if (IS_VALLEYVIEW(dev)) { > + if (INTEL_INFO(dev)->gen >= 7) { > swizzle_x = I915_BIT_6_SWIZZLE_NONE; > swizzle_y = I915_BIT_6_SWIZZLE_NONE; > } else if (INTEL_INFO(dev)->gen >= 6) { > -- > 1.8.4.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Sat, 8 Mar 2014 11:36:24 +0100 Daniel Vetter <daniel@ffwll.ch> wrote: > On Fri, Mar 07, 2014 at 08:57:53AM -0800, Jesse Barnes wrote: > > As of IVB, the memory controller does internal swizzling already, so we > > shouldn't need to enable these. Based on an earlier fix from Kristian. > > > > Reported-by: Kristian Høgsberg <hoegsberg@gmail.com> > > Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> > > Imo the right approach here is to check whether any of the > preserved/inherited framebuffers has tiling enabled, and if so we need to > preserve the swizzling mode the bios has set. > > Also this should be done on gen6+ since those are the machines where > swizzling can be changed. Ah yeah good point... haven't checked to see if any BIOSes enable this automatically.
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 18ea6bc..dcf4b01 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -4296,6 +4296,9 @@ void i915_gem_init_swizzling(struct drm_device *dev) dev_priv->mm.bit_6_swizzle_x == I915_BIT_6_SWIZZLE_NONE) return; + if (INTEL_INFO(dev)->gen >= 7) + return; + I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) | DISP_TILE_SURFACE_SWIZZLING); @@ -4305,10 +4308,6 @@ void i915_gem_init_swizzling(struct drm_device *dev) I915_WRITE(TILECTL, I915_READ(TILECTL) | TILECTL_SWZCTL); if (IS_GEN6(dev)) I915_WRITE(ARB_MODE, _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_SNB)); - else if (IS_GEN7(dev)) - I915_WRITE(ARB_MODE, _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_IVB)); - else if (IS_GEN8(dev)) - I915_WRITE(GAMTARBMODE, _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_BDW)); else BUG(); } diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c index eb99358..05c5d98 100644 --- a/drivers/gpu/drm/i915/i915_gem_tiling.c +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c @@ -91,7 +91,7 @@ i915_gem_detect_bit_6_swizzle(struct drm_device *dev) uint32_t swizzle_x = I915_BIT_6_SWIZZLE_UNKNOWN; uint32_t swizzle_y = I915_BIT_6_SWIZZLE_UNKNOWN; - if (IS_VALLEYVIEW(dev)) { + if (INTEL_INFO(dev)->gen >= 7) { swizzle_x = I915_BIT_6_SWIZZLE_NONE; swizzle_y = I915_BIT_6_SWIZZLE_NONE; } else if (INTEL_INFO(dev)->gen >= 6) {
As of IVB, the memory controller does internal swizzling already, so we shouldn't need to enable these. Based on an earlier fix from Kristian. Reported-by: Kristian Høgsberg <hoegsberg@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> --- drivers/gpu/drm/i915/i915_gem.c | 7 +++---- drivers/gpu/drm/i915/i915_gem_tiling.c | 2 +- 2 files changed, 4 insertions(+), 5 deletions(-)