| Message ID | 1394233957-3904-5-git-send-email-przanoni@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Fri, 2014-03-07 at 20:12 -0300, Paulo Zanoni wrote: > From: Paulo Zanoni <paulo.r.zanoni@intel.com> > > Now that PC8 is part of runtime PM, the check is useless. > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Looks ok. It could be applied already after 2/6. Reviewed-by: Imre Deak <imre.deak@intel.com> > --- > drivers/gpu/drm/i915/i915_drv.c | 10 ++-------- > drivers/gpu/drm/i915/i915_drv.h | 1 - > drivers/gpu/drm/i915/intel_display.c | 4 ---- > 3 files changed, 2 insertions(+), 13 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index 2c62e0c..55f0181 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -841,10 +841,7 @@ static void snb_runtime_suspend(struct drm_i915_private *dev_priv) > > static void hsw_runtime_suspend(struct drm_i915_private *dev_priv) > { > - struct drm_device *dev = dev_priv->dev; > - > - if (HAS_PC8(dev)) > - hsw_enable_pc8(dev_priv); > + hsw_enable_pc8(dev_priv); > } > > static void snb_runtime_resume(struct drm_i915_private *dev_priv) > @@ -861,10 +858,7 @@ static void snb_runtime_resume(struct drm_i915_private *dev_priv) > > static void hsw_runtime_resume(struct drm_i915_private *dev_priv) > { > - struct drm_device *dev = dev_priv->dev; > - > - if (HAS_PC8(dev)) > - hsw_disable_pc8(dev_priv); > + hsw_disable_pc8(dev_priv); > } > > static int intel_runtime_suspend(struct device *device) > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 309852d..1debc412 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -1997,7 +1997,6 @@ struct drm_i915_cmd_table { > #define HAS_DDI(dev) (INTEL_INFO(dev)->has_ddi) > #define HAS_FPGA_DBG_UNCLAIMED(dev) (INTEL_INFO(dev)->has_fpga_dbg) > #define HAS_PSR(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev)) > -#define HAS_PC8(dev) (IS_HASWELL(dev)) /* XXX HSW:ULX */ > #define HAS_RUNTIME_PM(dev) (IS_GEN6(dev) || IS_HASWELL(dev)) > > #define INTEL_PCH_DEVICE_ID_MASK 0xff00 > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 35f65c1..d6092be 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -6818,8 +6818,6 @@ void hsw_enable_pc8(struct drm_i915_private *dev_priv) > struct drm_device *dev = dev_priv->dev; > uint32_t val; > > - WARN_ON(!HAS_PC8(dev)); > - > DRM_DEBUG_KMS("Enabling package C8+\n"); > > if (dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) { > @@ -6838,8 +6836,6 @@ void hsw_disable_pc8(struct drm_i915_private *dev_priv) > struct drm_device *dev = dev_priv->dev; > uint32_t val; > > - WARN_ON(!HAS_PC8(dev)); > - > DRM_DEBUG_KMS("Disabling package C8+\n"); > > hsw_restore_lcpll(dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 2c62e0c..55f0181 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -841,10 +841,7 @@ static void snb_runtime_suspend(struct drm_i915_private *dev_priv) static void hsw_runtime_suspend(struct drm_i915_private *dev_priv) { - struct drm_device *dev = dev_priv->dev; - - if (HAS_PC8(dev)) - hsw_enable_pc8(dev_priv); + hsw_enable_pc8(dev_priv); } static void snb_runtime_resume(struct drm_i915_private *dev_priv) @@ -861,10 +858,7 @@ static void snb_runtime_resume(struct drm_i915_private *dev_priv) static void hsw_runtime_resume(struct drm_i915_private *dev_priv) { - struct drm_device *dev = dev_priv->dev; - - if (HAS_PC8(dev)) - hsw_disable_pc8(dev_priv); + hsw_disable_pc8(dev_priv); } static int intel_runtime_suspend(struct device *device) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 309852d..1debc412 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1997,7 +1997,6 @@ struct drm_i915_cmd_table { #define HAS_DDI(dev) (INTEL_INFO(dev)->has_ddi) #define HAS_FPGA_DBG_UNCLAIMED(dev) (INTEL_INFO(dev)->has_fpga_dbg) #define HAS_PSR(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev)) -#define HAS_PC8(dev) (IS_HASWELL(dev)) /* XXX HSW:ULX */ #define HAS_RUNTIME_PM(dev) (IS_GEN6(dev) || IS_HASWELL(dev)) #define INTEL_PCH_DEVICE_ID_MASK 0xff00 diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 35f65c1..d6092be 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -6818,8 +6818,6 @@ void hsw_enable_pc8(struct drm_i915_private *dev_priv) struct drm_device *dev = dev_priv->dev; uint32_t val; - WARN_ON(!HAS_PC8(dev)); - DRM_DEBUG_KMS("Enabling package C8+\n"); if (dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) { @@ -6838,8 +6836,6 @@ void hsw_disable_pc8(struct drm_i915_private *dev_priv) struct drm_device *dev = dev_priv->dev; uint32_t val; - WARN_ON(!HAS_PC8(dev)); - DRM_DEBUG_KMS("Disabling package C8+\n"); hsw_restore_lcpll(dev_priv);