From patchwork Fri Mar 7 23:12:36 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paulo Zanoni X-Patchwork-Id: 3795511 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id CA394BF540 for ; Fri, 7 Mar 2014 23:13:00 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id EAAED202F2 for ; Fri, 7 Mar 2014 23:12:59 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 136EE202E9 for ; Fri, 7 Mar 2014 23:12:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4717CFB692; Fri, 7 Mar 2014 15:12:56 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-yh0-f53.google.com (mail-yh0-f53.google.com [209.85.213.53]) by gabe.freedesktop.org (Postfix) with ESMTP id 3FD6BFB691 for ; Fri, 7 Mar 2014 15:12:53 -0800 (PST) Received: by mail-yh0-f53.google.com with SMTP id i57so2049648yha.12 for ; Fri, 07 Mar 2014 15:12:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=6Am4H7gXd9jgyciypmjgyDAopZIYBJQ/5kGUNMRlk00=; b=RwXIf6WUaivS78l8sacKKZRmJnz4ZeuY3lHzORM5MlqGoWE8C0j600JPtD0ZhJoSrp d+uv2ZlnaY/9VFVngrvAfp8ux5TphuH50w+myaS3Sv/kMjG5fgaCXmhI7cGj0lY4fW57 5AP/NKyEuV6USRj/dmUeEncaT05nDycs0GwqQ8NYxOHirpCpnz1r26djuP6u+j8gFZy0 sGPOCMEbU0r/D2ZWZ2jeskxjRRBhVXJnRwigdTDDLkrcxsihEbquamMUOT6WX0yqPiug nClAh7/vXXv4msldKBnQ96mLfWSJfOSphLUOkySZNyjMwKKwQ2KF7uJu4IZ5cLRzSHDT hgvQ== X-Received: by 10.236.37.105 with SMTP id x69mr25056296yha.15.1394233972963; Fri, 07 Mar 2014 15:12:52 -0800 (PST) Received: from localhost.localdomain ([177.132.70.215]) by mx.google.com with ESMTPSA id t58sm32569759yho.20.2014.03.07.15.12.51 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 07 Mar 2014 15:12:52 -0800 (PST) From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Fri, 7 Mar 2014 20:12:36 -0300 Message-Id: <1394233957-3904-6-git-send-email-przanoni@gmail.com> X-Mailer: git-send-email 1.8.5.3 In-Reply-To: <1394233957-3904-1-git-send-email-przanoni@gmail.com> References: <1394233957-3904-1-git-send-email-przanoni@gmail.com> Cc: Paulo Zanoni Subject: [Intel-gfx] [PATCH 5/6] drm/i915: BDW needs D_COMP writes through MCHBAR X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Paulo Zanoni That's what the spec said! And HSW needs it through pcode (you can only read it through MCHBAR), so create hsw_write_dcomp to abstract the weirdness. Signed-off-by: Paulo Zanoni Reviewed-by: Imre Deak --- drivers/gpu/drm/i915/intel_display.c | 28 ++++++++++++++++++---------- 1 file changed, 18 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index d6092be..2be4129 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -6664,6 +6664,22 @@ static void assert_can_disable_lcpll(struct drm_i915_private *dev_priv) spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); } +static void hsw_write_dcomp(struct drm_i915_private *dev_priv, uint32_t val) +{ + struct drm_device *dev = dev_priv->dev; + + if (IS_HASWELL(dev)) { + mutex_lock(&dev_priv->rps.hw_lock); + if (sandybridge_pcode_write(dev_priv, GEN6_PCODE_WRITE_D_COMP, + val)) + DRM_ERROR("Failed to disable D_COMP\n"); + mutex_unlock(&dev_priv->rps.hw_lock); + } else { + I915_WRITE(D_COMP, val); + } + POSTING_READ(D_COMP); +} + /* * This function implements pieces of two sequences from BSpec: * - Sequence for display software to disable LCPLL @@ -6701,11 +6717,7 @@ static void hsw_disable_lcpll(struct drm_i915_private *dev_priv, val = I915_READ(D_COMP); val |= D_COMP_COMP_DISABLE; - mutex_lock(&dev_priv->rps.hw_lock); - if (sandybridge_pcode_write(dev_priv, GEN6_PCODE_WRITE_D_COMP, val)) - DRM_ERROR("Failed to disable D_COMP\n"); - mutex_unlock(&dev_priv->rps.hw_lock); - POSTING_READ(D_COMP); + hsw_write_dcomp(dev_priv, val); ndelay(100); if (wait_for((I915_READ(D_COMP) & D_COMP_RCOMP_IN_PROGRESS) == 0, 1)) @@ -6760,11 +6772,7 @@ static void hsw_restore_lcpll(struct drm_i915_private *dev_priv) val = I915_READ(D_COMP); val |= D_COMP_COMP_FORCE; val &= ~D_COMP_COMP_DISABLE; - mutex_lock(&dev_priv->rps.hw_lock); - if (sandybridge_pcode_write(dev_priv, GEN6_PCODE_WRITE_D_COMP, val)) - DRM_ERROR("Failed to enable D_COMP\n"); - mutex_unlock(&dev_priv->rps.hw_lock); - POSTING_READ(D_COMP); + hsw_write_dcomp(dev_priv, val); val = I915_READ(LCPLL_CTL); val &= ~LCPLL_PLL_DISABLE;