From patchwork Thu Mar 13 16:00:18 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: deepak.s@linux.intel.com X-Patchwork-Id: 3826831 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 53849BF540 for ; Thu, 13 Mar 2014 16:01:30 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7B7BB201CE for ; Thu, 13 Mar 2014 16:01:29 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 8299B201E9 for ; Thu, 13 Mar 2014 16:01:28 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B5EA4FB2E4; Thu, 13 Mar 2014 09:01:26 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 3DB19FB2DC for ; Thu, 13 Mar 2014 09:01:20 -0700 (PDT) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP; 13 Mar 2014 09:00:53 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.97,648,1389772800"; d="scan'208";a="471727421" Received: from ds1-mobl1.gar.corp.intel.com (HELO deepaks.iind.intel.com) ([10.223.188.182]) by orsmga001.jf.intel.com with ESMTP; 13 Mar 2014 09:00:38 -0700 From: deepak.s@linux.intel.com To: intel-gfx@lists.freedesktop.org Date: Thu, 13 Mar 2014 21:30:18 +0530 Message-Id: <1394726418-10831-4-git-send-email-deepak.s@linux.intel.com> X-Mailer: git-send-email 1.8.4.2 In-Reply-To: <1394726418-10831-1-git-send-email-deepak.s@linux.intel.com> References: <531718EF.3060201@intel.com> <1394726418-10831-1-git-send-email-deepak.s@linux.intel.com> Cc: Deepak S Subject: [Intel-gfx] [PATCH v2 3/3] drm/i915: Add boot paramter to control rps boost at boot time. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Deepak S We are adding a module paramter to control rps boost. By default, we enable the boost for better performace. Based on the need (perf/power) we can either enable/disable. v2: Addressed rps default comment (Jani) Signed-off-by: Deepak S --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem.c | 16 +++++++++++++++- drivers/gpu/drm/i915/i915_params.c | 5 +++++ 3 files changed, 21 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 607042b..7808319 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2106,6 +2106,7 @@ struct i915_params { int panel_use_ssc; int vbt_sdvo_panel_type; int enable_rc6; + int enable_rps_boost; int enable_fbc; int enable_ppgtt; int enable_psr; diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 92b0b41..23a4700 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -1002,6 +1002,17 @@ static bool can_wait_boost(struct drm_i915_file_private *file_priv) return !atomic_xchg(&file_priv->rps_wait_boost, true); } +static int intel_enable_rps_boost(struct drm_device *dev) +{ + /* No RPS Boost before Ironlake */ + if (INTEL_INFO(dev)->gen < 6) + return 0; + + /* Respect the kernel parameter if it is set */ + return i915.enable_rps_boost; + +} + /** * __wait_seqno - wait until execution of seqno has finished * @ring: the ring expected to report seqno @@ -1042,8 +1053,11 @@ static int __wait_seqno(struct intel_ring_buffer *ring, u32 seqno, timeout_expire = timeout ? jiffies + timespec_to_jiffies_timeout(timeout) : 0; - if (INTEL_INFO(dev)->gen >= 6 && can_wait_boost(file_priv)) { + if (INTEL_INFO(dev)->gen >= 6 && can_wait_boost(file_priv) && + intel_enable_rps_boost(ring->dev)) { + gen6_rps_boost(dev_priv); + if (file_priv) mod_delayed_work(dev_priv->wq, &file_priv->mm.idle_work, diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c index a66ffb6..2d207e3 100644 --- a/drivers/gpu/drm/i915/i915_params.c +++ b/drivers/gpu/drm/i915/i915_params.c @@ -34,6 +34,7 @@ struct i915_params i915 __read_mostly = { .panel_use_ssc = -1, .vbt_sdvo_panel_type = -1, .enable_rc6 = -1, + .enable_rps_boost = 1, .enable_fbc = -1, .enable_hangcheck = true, .enable_ppgtt = -1, @@ -78,6 +79,10 @@ MODULE_PARM_DESC(enable_rc6, "For example, 3 would enable rc6 and deep rc6, and 7 would enable everything. " "default: -1 (use per-chip default)"); +module_param_named(enable_rps_boost, i915.enable_rps_boost, int, 0600); +MODULE_PARM_DESC(enable_rps_boost, + "Enable/Disable boost RPS frequency (default: enabled (1))"); + module_param_named(enable_fbc, i915.enable_fbc, int, 0600); MODULE_PARM_DESC(enable_fbc, "Enable frame buffer compression for power savings "