From patchwork Mon Mar 17 16:27:16 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kenneth Graunke X-Patchwork-Id: 3845061 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 99546BF540 for ; Mon, 17 Mar 2014 16:28:54 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 87A6C20166 for ; Mon, 17 Mar 2014 16:28:53 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id C712420103 for ; Mon, 17 Mar 2014 16:28:48 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3A9496FCC6; Mon, 17 Mar 2014 09:28:48 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from homiemail-a4.g.dreamhost.com (caiajhbdccac.dreamhost.com [208.97.132.202]) by gabe.freedesktop.org (Postfix) with ESMTP id B5B4D6FCC6 for ; Mon, 17 Mar 2014 09:28:46 -0700 (PDT) Received: from homiemail-a4.g.dreamhost.com (localhost [127.0.0.1]) by homiemail-a4.g.dreamhost.com (Postfix) with ESMTP id 1BB8151C070; Mon, 17 Mar 2014 09:28:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=whitecape.org; h=from:to :cc:subject:date:message-id; s=whitecape.org; bh=+SumLIt51Eg3tun a/AWRhjQl0JY=; b=vmWihDfjVwFBafDJqAL1bbFC13kY9KwSS9uyx13EEAfTysY crQljEHqUSp9m+IrVhxzcKGqXWkYuxgTKMOM2G+xlVm8a5rXqtVnMdKQ5swR14Pq 4yVD9Fjofa781VumI+yhVNOJo2Qz41RRvMNYozNiAT9HkPcL0MxpT6KwYP9M= Received: from zidane.ak.intel.com (fruit.freedesktop.org [131.252.210.190]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (No client certificate requested) (Authenticated sender: kenneth@whitecape.org) by homiemail-a4.g.dreamhost.com (Postfix) with ESMTPSA id BDCE551C069; Mon, 17 Mar 2014 09:28:44 -0700 (PDT) From: Kenneth Graunke To: intel-gfx@lists.freedesktop.org Date: Mon, 17 Mar 2014 09:27:16 -0700 Message-Id: <1395073636-2484-1-git-send-email-kenneth@whitecape.org> X-Mailer: git-send-email 1.8.4.2 Subject: [Intel-gfx] [PATCH] uxa: Support BLT ring flushes on Broadwell, but not render ring flushes. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Several places (such as intel_cache_expire) call intel_emit_batch_flush, so it needs to work on Broadwell. Sometimes the batch is empty, in which case current_batch may not yet be BLT_RING. The PIPE_CONTROL code has not been ported to work on Broadwell, so trying to do a render ring flush will hang the GPU. It also doesn't make any sense to do a render ring flush, given that we never use the render ring for UXA on Broadwell. Signed-off-by: Kenneth Graunke --- src/uxa/intel_batchbuffer.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) This is an alternative to my old "uxa: Don't emit PIPE_CONTROLs in an empty batch." patch, which Chris pointed out was broken. Chris, In the future, if you're going to rewrite significant portions of my patches, could you please at least put your Signed-off-by or something on it? In the version of "uxa: Enable BLT acceleration on Broadwell.", you committed, at least half the patch was not actually written by me, and the resulting code either hit assertion failures or GPU hangs if run at all. It's pretty disconcerting to see code committed under my name, with my Signed-off-by, that doesn't work and which I've never even seen before. diff --git a/src/uxa/intel_batchbuffer.c b/src/uxa/intel_batchbuffer.c index 4aabe48..ec71ce2 100644 --- a/src/uxa/intel_batchbuffer.c +++ b/src/uxa/intel_batchbuffer.c @@ -183,11 +183,11 @@ void intel_batch_emit_flush(ScrnInfoPtr scrn) int flags; assert (!intel->in_batch_atomic); - assert (INTEL_INFO(intel)->gen < 0100); /* Big hammer, look to the pipelined flushes in future. */ if ((INTEL_INFO(intel)->gen >= 060)) { - if (intel->current_batch == BLT_BATCH) { + if (intel->current_batch == BLT_BATCH || + INTEL_INFO(intel)->gen >= 0100) { BEGIN_BATCH_BLT(4); OUT_BATCH(MI_FLUSH_DW | 2); OUT_BATCH(0);