From patchwork Thu Mar 27 15:28:27 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: arun.siluvery@linux.intel.com X-Patchwork-Id: 3898331 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id D2A2BBF540 for ; Thu, 27 Mar 2014 15:35:56 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 05CFE20240 for ; Thu, 27 Mar 2014 15:35:56 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 172F420237 for ; Thu, 27 Mar 2014 15:35:55 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B78486E0D3; Thu, 27 Mar 2014 08:35:54 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 89ABF6E0D3 for ; Thu, 27 Mar 2014 08:35:53 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP; 27 Mar 2014 08:29:46 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.97,743,1389772800"; d="scan'208";a="508284835" Received: from asiluver-linux.iwi.intel.com ([172.28.253.147]) by fmsmga002.fm.intel.com with ESMTP; 27 Mar 2014 08:29:04 -0700 From: arun.siluvery@linux.intel.com To: intel-gfx@lists.freedesktop.org Date: Thu, 27 Mar 2014 15:28:27 +0000 Message-Id: <1395934109-28522-2-git-send-email-arun.siluvery@linux.intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1395934109-28522-1-git-send-email-arun.siluvery@linux.intel.com> References: <1395934109-28522-1-git-send-email-arun.siluvery@linux.intel.com> Subject: [Intel-gfx] [RFC 1/3] drm/i915: Prepare gem object to handle resize X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: "Siluvery, Arun" This patch adds data structure to handle gem object resize. One such usecase where it is required is mipmaps; you cannot know whether higher level mipmaps are required at the time of creating them, so it is best to defer memory allocation for higher levels if possible. GEM object should be resizeable to achieve this. Add new parameter to i915_gem_create to specify initial size of backing store. When the object is created we allocate backing store only for base size, in the case of mipmaps it would be level0. scratch page is used for lazy allocation (Daniel) A stop marker denotes the end of real pages. if higher levels are required additional space is requested using new ioctl. Although the usecase considered is mipmaps, it can be used for other purposes. Change-Id: I1acf539bb7d8d861deb7fbb1d2f32265f22ad28f Signed-off-by: Siluvery, Arun --- drivers/gpu/drm/i915/i915_drv.h | 7 +++++++ drivers/gpu/drm/i915/i915_gem.c | 28 +++++++++++++++++++++++++++- include/uapi/drm/i915_drm.h | 7 +++++++ 3 files changed, 41 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 4069800..cf65aad 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1875,6 +1875,13 @@ struct drm_i915_gem_object { } userptr; }; + /* to handle resizing of gem object */ + struct i915_gem_resize { + uint32_t stop; + uint32_t base_size; + struct page *scratch_page; + } gem_resize; + /** Object userdata */ uint32_t userdata; }; diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 6153e01..71d7526 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -311,10 +311,36 @@ int i915_gem_create_ioctl(struct drm_device *dev, void *data, struct drm_file *file) { + int ret; + int total_page_count; + struct drm_i915_gem_object *obj; struct drm_i915_gem_create *args = data; - return i915_gem_create(file, dev, + ret = i915_gem_create(file, dev, args->size, &args->handle); + + if (ret) + return ret; + + /* + * TODO: args->pad is filled with garbage + * Need a better method to identify that its a resizeable object, + * use a magic number temporarily + */ + if (args->pad != 0x12345678) + return ret; + + obj = to_intel_bo(drm_gem_object_lookup(dev, file, args->handle)); + if (&obj->base == NULL) { + printk(KERN_ERR "%s(), object not found\n", __func__); + return -ENOENT; + } + total_page_count = obj->base.size / PAGE_SIZE; + obj->gem_resize.base_size = 0; + obj->gem_resize.stop = total_page_count; + obj->gem_resize.scratch_page = NULL; + + return 0; } static inline int diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h index aa8469e..e455c9d 100644 --- a/include/uapi/drm/i915_drm.h +++ b/include/uapi/drm/i915_drm.h @@ -521,6 +521,13 @@ struct drm_i915_gem_create { */ __u32 handle; __u32 pad; + /** + * When an object needs to be resized this denotes the size for + * which backing storage is created initially + * eg in case of mipmaps, size of level0 + * object is resized later to allocate for higher levels + */ + __u64 base_size; }; struct drm_i915_gem_pread {