From patchwork Thu Mar 27 15:30:02 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: arun.siluvery@linux.intel.com X-Patchwork-Id: 3898281 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id EF3F39F334 for ; Thu, 27 Mar 2014 15:30:40 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C6A5520225 for ; Thu, 27 Mar 2014 15:30:39 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 8F6552013A for ; Thu, 27 Mar 2014 15:30:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3B5556E98F; Thu, 27 Mar 2014 08:30:38 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id 68C536E98F for ; Thu, 27 Mar 2014 08:30:36 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga102.fm.intel.com with ESMTP; 27 Mar 2014 08:30:35 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.97,743,1389772800"; d="scan'208";a="508285633" Received: from asiluver-linux.iwi.intel.com ([172.28.253.147]) by fmsmga002.fm.intel.com with ESMTP; 27 Mar 2014 08:30:06 -0700 From: arun.siluvery@linux.intel.com To: intel-gfx@lists.freedesktop.org Date: Thu, 27 Mar 2014 15:30:02 +0000 Message-Id: <1395934202-28722-1-git-send-email-arun.siluvery@linux.intel.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Subject: [Intel-gfx] [RFC] tests/gem_bo_resize: New test to test gem object resize X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: "Siluvery, Arun" Add new case to test gem object resize implementation. The current test creates two objects, one of them is resizeable. Before resize it is filled with data from source object using GPU blt. Object is resized and then filled the new space with different set of data. The content is compared against source to determine validity of new pages. The resize ioctl implementation itself is not complete. This test succeeds if the resized space is filled using GEM_PWRITE but it is failing if GPU blt commands are used. Signed-off-by: Siluvery, Arun --- tests/gem_bo_resize.c | 319 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 319 insertions(+) create mode 100644 tests/gem_bo_resize.c diff --git a/tests/gem_bo_resize.c b/tests/gem_bo_resize.c new file mode 100644 index 0000000..2af54bd --- /dev/null +++ b/tests/gem_bo_resize.c @@ -0,0 +1,319 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "drm.h" +#include "i915_drm.h" +#include "drmtest.h" +#include "intel_chipset.h" +#include "intel_gpu_tools.h" + +#define OBJECT_SIZE (4 * 4 * 1024) +#define COPY_BLT_CMD (2<<29|0x53<<22|0x6) +#define BLT_WRITE_ALPHA (1<<21) +#define BLT_WRITE_RGB (1<<20) +#define BLT_SRC_TILED (1<<15) +#define BLT_DST_TILED (1<<11) + +static uint32_t create_resizeable_bo(int fd, int total_size, int base_size) +{ + struct drm_i915_gem_create create; + + create.handle = 0; + create.size = total_size; + create.base_size = base_size; + create.pad = 0x12345678; + do_ioctl(fd, DRM_IOCTL_I915_GEM_CREATE, &create); + igt_assert(create.handle); + + return create.handle; +} + +static int do_write(int fd, int handle, void *buf, int offset, int size) +{ + struct drm_i915_gem_pwrite gem_pwrite; + + memset(&gem_pwrite, 0, sizeof(gem_pwrite)); + gem_pwrite.handle = handle; + gem_pwrite.data_ptr = (uintptr_t)buf; + gem_pwrite.size = size; + gem_pwrite.offset = offset; + + return ioctl(fd, DRM_IOCTL_I915_GEM_PWRITE, &gem_pwrite); +} + +static int gem_linear_blt(int fd, + uint32_t *batch, + uint32_t src, + uint32_t dst, + uint32_t length, + struct drm_i915_gem_relocation_entry *reloc) +{ + uint32_t *b = batch; + int height = length / (16 * 1024); + + igt_assert(height <= 1<<16); + + if (height) { + int i = 0; + b[i++] = COPY_BLT_CMD | BLT_WRITE_ALPHA | BLT_WRITE_RGB; + if (intel_gen(intel_get_drm_devid(fd)) >= 8) + b[i-1]+=2; + b[i++] = 0xcc << 16 | 1 << 25 | 1 << 24 | (16*1024); + b[i++] = 0; + b[i++] = height << 16 | (4*1024); + b[i++] = 0; + reloc->offset = (b-batch+4) * sizeof(uint32_t); + reloc->delta = 0; + reloc->target_handle = dst; + reloc->read_domains = I915_GEM_DOMAIN_RENDER; + reloc->write_domain = I915_GEM_DOMAIN_RENDER; + reloc->presumed_offset = 0; + reloc++; + if (intel_gen(intel_get_drm_devid(fd)) >= 8) + b[i++] = 0; /* FIXME */ + + b[i++] = 0; + b[i++] = 16*1024; + b[i++] = 0; + reloc->offset = (b-batch+7) * sizeof(uint32_t); + if (intel_gen(intel_get_drm_devid(fd)) >= 8) + reloc->offset += sizeof(uint32_t); + reloc->delta = 0; + reloc->target_handle = src; + reloc->read_domains = I915_GEM_DOMAIN_RENDER; + reloc->write_domain = 0; + reloc->presumed_offset = 0; + reloc++; + if (intel_gen(intel_get_drm_devid(fd)) >= 8) + b[i++] = 0; /* FIXME */ + + b += i; + length -= height * 16*1024; + } + printf("length %d, height %d\n", length, height); + + if (length) { + int i = 0; + b[i++] = COPY_BLT_CMD | BLT_WRITE_ALPHA | BLT_WRITE_RGB; + if (intel_gen(intel_get_drm_devid(fd)) >= 8) + b[i-1]+=2; + b[i++] = 0xcc << 16 | 1 << 25 | 1 << 24 | (16*1024); + b[i++] = height << 16; + b[i++] = (1+height) << 16 | (length / 4); + b[i++] = 0; + reloc->offset = (b-batch+4) * sizeof(uint32_t); + reloc->delta = 0; + reloc->target_handle = dst; + reloc->read_domains = I915_GEM_DOMAIN_RENDER; + reloc->write_domain = I915_GEM_DOMAIN_RENDER; + reloc->presumed_offset = 0; + reloc++; + if (intel_gen(intel_get_drm_devid(fd)) >= 8) + b[i++] = 0; /* FIXME */ + + b[i++] = height << 16; + b[i++] = 16*1024; + b[i++] = 0; + reloc->offset = (b-batch+7) * sizeof(uint32_t); + if (intel_gen(intel_get_drm_devid(fd)) >= 8) + reloc->offset += sizeof(uint32_t); + reloc->delta = 0; + reloc->target_handle = src; + reloc->read_domains = I915_GEM_DOMAIN_RENDER; + reloc->write_domain = 0; + reloc->presumed_offset = 0; + reloc++; + if (intel_gen(intel_get_drm_devid(fd)) >= 8) + b[i++] = 0; /* FIXME */ + + b += i; + } + + b[0] = MI_BATCH_BUFFER_END; + b[1] = 0; + + return (b+2 - batch) * sizeof(uint32_t); +} + +static int do_blit(int fd, uint32_t src, uint32_t dst, uint32_t length) +{ + int len; + int ring; + uint32_t handle; + uint32_t buf[20]; + struct drm_i915_gem_execbuffer2 execbuf; + struct drm_i915_gem_exec_object2 exec[3]; + struct drm_i915_gem_relocation_entry reloc[4]; + + handle = gem_create(fd, 4096); + + len = gem_linear_blt(fd, buf, src, dst, length, reloc); + + gem_write(fd, handle, 0, buf, len); + + exec[0].handle = src; + exec[0].relocation_count = 0; + exec[0].relocs_ptr = 0; + exec[0].alignment = 0; + exec[0].offset = 0; + exec[0].flags = 0; + exec[0].rsvd1 = 0; + exec[0].rsvd2 = 0; + + exec[1].handle = dst; + exec[1].relocation_count = 0; + exec[1].relocs_ptr = 0; + exec[1].alignment = 0; + exec[1].offset = 0; + exec[1].flags = 0; + exec[1].rsvd1 = 0; + exec[1].rsvd2 = 0; + + exec[2].handle = handle; + if (intel_gen(intel_get_drm_devid(fd)) >= 8) + exec[2].relocation_count = len > 56 ? 4 : 2; + else + exec[2].relocation_count = len > 40 ? 4 : 2; + exec[2].relocs_ptr = (uintptr_t)reloc; + exec[2].alignment = 0; + exec[2].offset = 0; + exec[2].flags = 0; + exec[2].rsvd1 = 0; + exec[2].rsvd2 = 0; + + ring = 0; + if (HAS_BLT_RING(intel_get_drm_devid(fd))) + ring = I915_EXEC_BLT; + + execbuf.buffers_ptr = (uintptr_t)exec; + execbuf.buffer_count = 3; + execbuf.batch_start_offset = 0; + execbuf.batch_len = len; + execbuf.cliprects_ptr = 0; + execbuf.num_cliprects = 0; + execbuf.DR1 = 0; + execbuf.DR4 = 0; + execbuf.flags = ring; + i915_execbuffer2_set_context_id(execbuf, 0); + execbuf.rsvd2 = 0; + + printf("submit buffers\n"); + gem_execbuf(fd, &execbuf); + + gem_sync(fd, handle); + + fflush(stdout); + gem_close(fd, handle); + + return len; +} + +static void test_gem_object_resize(int fd) +{ + int i, offset, step; + int len, count, ret, copy_size; + uint32_t handle, src, dst; + + uint8_t *src_addr, *dst_addr; + struct drm_i915_gem_mmap arg; + struct drm_i915_gem_resize gem_bo; + uint8_t buf[2*OBJECT_SIZE]; + + printf("GEM object resize test\n"); + + src = gem_create(fd, 2*OBJECT_SIZE); + dst = create_resizeable_bo(fd, 2*OBJECT_SIZE, OBJECT_SIZE); + + memset(buf, 0x55, 2*OBJECT_SIZE); + + ret = do_write(fd, src, buf, 0, 2*OBJECT_SIZE); + igt_assert(ret == 0); + + arg.handle = src; + arg.offset = 0; + arg.size = 2*OBJECT_SIZE; + ret = ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg); + igt_assert(ret == 0); + src_addr = (uint8_t *)(uintptr_t)arg.addr_ptr; + + len = do_blit(fd, src, dst, OBJECT_SIZE); + + copy_size = 2*OBJECT_SIZE; + + printf("resize the object\n"); + gem_bo.handle = dst; + gem_bo.size = 2*OBJECT_SIZE; + gem_bo.curr_size = OBJECT_SIZE; + gem_bo.resize = copy_size; + gem_bo.flags = 0; + ret = ioctl(fd, DRM_IOCTL_I915_GEM_RESIZE, &gem_bo); + igt_assert(ret == 0); + + + memset(buf, 0xAA, 2*OBJECT_SIZE); + ret = do_write(fd, dst, buf, OBJECT_SIZE, OBJECT_SIZE); + igt_assert(ret == 0); + ret = do_write(fd, src, buf, OBJECT_SIZE, OBJECT_SIZE); + igt_assert(ret == 0); + + /* check contents after resize */ + arg.handle = dst; + arg.offset = 0; + arg.size = copy_size; + ret = ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg); + igt_assert(ret == 0); + dst_addr = (uint8_t *)(uintptr_t)arg.addr_ptr; + + igt_assert(memcmp(dst_addr, src_addr, copy_size) == 0); + + munmap(dst_addr, copy_size); + munmap(src_addr, copy_size); +} + + +int fd; + +int main(int argc, char **argv) +{ + igt_subtest_init(argc, argv); + + igt_fixture + fd = drm_open_any(); + + igt_subtest("gem object resize test") + test_gem_object_resize(fd); + + close(fd); + igt_exit(); +}