diff mbox

[15/49] drm/i915/bdw: GEN8 semaphoreless ring add request

Message ID 1395943218-7708-16-git-send-email-oscar.mateo@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

oscar.mateo@intel.com March 27, 2014, 5:59 p.m. UTC 
From: Ben Widawsky <benjamin.widawsky@intel.com>

Semaphores have changed, so let's not submit useless commands to the
ring.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

v2: Several rebases.

Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c | 23 ++++++++++++++++++++++-
 1 file changed, 22 insertions(+), 1 deletion(-)
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 6e53ce1..e4b4c57 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -722,6 +722,24 @@  gen6_add_request(struct intel_engine *ring)
 	return 0;
 }
 
+static int
+gen8_add_request(struct intel_engine *ring)
+{
+	int ret;
+
+	ret = intel_ring_begin(ring, 4);
+	if (ret)
+		return ret;
+
+	intel_ring_emit(ring, MI_STORE_DWORD_INDEX);
+	intel_ring_emit(ring, I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
+	intel_ring_emit(ring, ring->outstanding_lazy_seqno);
+	intel_ring_emit(ring, MI_USER_INTERRUPT);
+	__intel_ring_advance(ring);
+
+	return 0;
+}
+
 static inline bool i915_gem_has_seqno_wrapped(struct drm_device *dev,
 					      u32 seqno)
 {
@@ -1943,6 +1961,7 @@  int intel_init_render_ring(struct drm_device *dev)
 				ring->write_tail = gen8_write_tail_lrc;
 				ring->init = init_render_ring_lrc;
 			}
+			ring->add_request = gen8_add_request;
 			ring->flush = gen8_render_ring_flush;
 			ring->irq_get = gen8_ring_get_irq;
 			ring->irq_put = gen8_ring_put_irq;
@@ -2113,6 +2132,7 @@  int intel_init_bsd_ring(struct drm_device *dev)
 				ring->write_tail = gen8_write_tail_lrc;
 				ring->init = init_ring_common_lrc;
 			}
+			ring->add_request = gen8_add_request;
 			ring->irq_enable_mask =
 				GT_RENDER_USER_INTERRUPT << GEN8_VCS1_IRQ_SHIFT;
 			ring->irq_get = gen8_ring_get_irq;
@@ -2171,6 +2191,7 @@  int intel_init_blt_ring(struct drm_device *dev)
 			ring->write_tail = gen8_write_tail_lrc;
 			ring->init = init_ring_common_lrc;
 		}
+		ring->add_request = gen8_add_request;
 		ring->irq_enable_mask =
 			GT_RENDER_USER_INTERRUPT << GEN8_BCS_IRQ_SHIFT;
 		ring->irq_get = gen8_ring_get_irq;
@@ -2206,12 +2227,12 @@  int intel_init_vebox_ring(struct drm_device *dev)
 	ring->add_request = gen6_add_request;
 	ring->get_seqno = gen6_ring_get_seqno;
 	ring->set_seqno = ring_set_seqno;
-
 	if (INTEL_INFO(dev)->gen >= 8) {
 		if (dev_priv->lrc_enabled) {
 			ring->write_tail = gen8_write_tail_lrc;
 			ring->init = init_ring_common_lrc;
 		}
+		ring->add_request = gen8_add_request;
 		ring->irq_enable_mask =
 			GT_RENDER_USER_INTERRUPT << GEN8_VECS_IRQ_SHIFT;
 		ring->irq_get = gen8_ring_get_irq;