From patchwork Thu Mar 27 17:59:46 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: oscar.mateo@intel.com X-Patchwork-Id: 3898611 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id C292EBF540 for ; Thu, 27 Mar 2014 17:09:35 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DF95320240 for ; Thu, 27 Mar 2014 17:09:34 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 0D5AA20237 for ; Thu, 27 Mar 2014 17:09:34 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AAE006E9EB; Thu, 27 Mar 2014 10:09:33 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 392906E9EB for ; Thu, 27 Mar 2014 10:09:31 -0700 (PDT) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga102.jf.intel.com with ESMTP; 27 Mar 2014 10:02:55 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.97,743,1389772800"; d="scan'208";a="501086536" Received: from omateolo-linux2.iwi.intel.com ([172.28.253.148]) by fmsmga001.fm.intel.com with ESMTP; 27 Mar 2014 10:06:00 -0700 From: oscar.mateo@intel.com To: intel-gfx@lists.freedesktop.org Date: Thu, 27 Mar 2014 17:59:46 +0000 Message-Id: <1395943218-7708-18-git-send-email-oscar.mateo@intel.com> X-Mailer: git-send-email 1.9.0 In-Reply-To: <1395943218-7708-1-git-send-email-oscar.mateo@intel.com> References: <1395943218-7708-1-git-send-email-oscar.mateo@intel.com> Cc: Ben Widawsky , Ben Widawsky Subject: [Intel-gfx] [PATCH 17/49] drm/i915/bdw: A bit more advanced context init/fini X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Ben Widawsky There are a few big differences between context init and fini with the previous implementation of hardware contexts. One of them is demonstrated in this patch: we must do a context initialization for every ring. The patch will still fail at context setup, and therefore won't break existing code or platform support. Regarding the context size, reading the register to calculate the sizes can work, I think, however the docs are very clear about the actual context sizes on GEN8, so just hardcode that and use it. Signed-off-by: Ben Widawsky v2: Rebased on top of the Full PPGTT series. It is important to notice that at this point we have one global default context per engine, all of them using the aliasing PPGTT (as opposed to the single global default context we have with legacy HW contexts). Signed-off-by: Oscar Mateo --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem_context.c | 5 +++++ drivers/gpu/drm/i915/i915_lrc.c | 40 ++++++++++++++++++++++++++++++++- 3 files changed, 45 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 264ea67..ff6a33c 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2316,6 +2316,7 @@ int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data, /* i915_lrc.c */ int gen8_gem_context_init(struct drm_device *dev); +void gen8_gem_context_fini(struct drm_device *dev); /* i915_gem_evict.c */ int __must_check i915_gem_evict_something(struct drm_device *dev, diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c index e92b9c5..4a6f1b0 100644 --- a/drivers/gpu/drm/i915/i915_gem_context.c +++ b/drivers/gpu/drm/i915/i915_gem_context.c @@ -440,6 +440,11 @@ void i915_gem_context_fini(struct drm_device *dev) * other code, leading to spurious errors. */ intel_gpu_reset(dev); + if (dev_priv->lrc_enabled) { + gen8_gem_context_fini(dev); + return; + } + /* When default context is created and switched to, base object refcount * will be 2 (+1 from object creation and +1 from do_switch()). * i915_gem_context_fini() will be called after gpu_idle() has switched diff --git a/drivers/gpu/drm/i915/i915_lrc.c b/drivers/gpu/drm/i915/i915_lrc.c index 3a93e99..10e6dbc 100644 --- a/drivers/gpu/drm/i915/i915_lrc.c +++ b/drivers/gpu/drm/i915/i915_lrc.c @@ -41,7 +41,45 @@ #include #include "i915_drv.h" +#define GEN8_LR_CONTEXT_SIZE (21 * PAGE_SIZE) + +void gen8_gem_context_fini(struct drm_device *dev) +{ + struct drm_i915_private *dev_priv = dev->dev_private; + struct intel_engine *ring; + int unused; + + for_each_ring(ring, dev_priv, unused) { + if (ring->default_context) { + i915_gem_object_ggtt_unpin(ring->default_context->obj); + i915_gem_context_unreference(ring->default_context); + ring->default_context = NULL; + } + } + + dev_priv->mm.aliasing_ppgtt = NULL; +} + int gen8_gem_context_init(struct drm_device *dev) { - return -ENOSYS; + struct drm_i915_private *dev_priv = dev->dev_private; + struct intel_engine *ring; + int ret = -ENOSYS, ring_id; + + dev_priv->hw_context_size = round_up(GEN8_LR_CONTEXT_SIZE, 4096); + + for_each_ring(ring, dev_priv, ring_id) { + ring->default_context = i915_gem_create_context(dev, + NULL, (ring_id == RCS)); + if (IS_ERR_OR_NULL(ring->default_context)) { + ret = PTR_ERR(ring->default_context); + DRM_DEBUG_DRIVER("Create ctx failed: %d\n", ret); + ring->default_context = NULL; + goto err_out; + } + } + +err_out: + gen8_gem_context_fini(dev); + return ret; }