From patchwork Mon Mar 31 18:13:55 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jesse Barnes X-Patchwork-Id: 3917301 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 7E5749F357 for ; Mon, 31 Mar 2014 18:14:16 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7405C203AA for ; Mon, 31 Mar 2014 18:14:15 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 7EAE6201BB for ; Mon, 31 Mar 2014 18:14:14 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 06CF16E3D0; Mon, 31 Mar 2014 11:14:14 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from gproxy4-pub.mail.unifiedlayer.com (gproxy4-pub.mail.unifiedlayer.com [69.89.23.142]) by gabe.freedesktop.org (Postfix) with SMTP id D3ADD6E3D2 for ; Mon, 31 Mar 2014 11:14:11 -0700 (PDT) Received: (qmail 9874 invoked by uid 0); 31 Mar 2014 18:14:11 -0000 Received: from unknown (HELO CMOut01) (10.0.90.82) by gproxy4.mail.unifiedlayer.com with SMTP; 31 Mar 2014 18:14:11 -0000 Received: from box514.bluehost.com ([74.220.219.114]) by CMOut01 with id kJE31n00s2UhLwi01JE6ok; Mon, 31 Mar 2014 12:14:10 -0600 X-Authority-Analysis: v=2.1 cv=ZpR+dbLG c=1 sm=1 tr=0 a=9W6Fsu4pMcyimqnCr1W0/w==:117 a=9W6Fsu4pMcyimqnCr1W0/w==:17 a=cNaOj0WVAAAA:8 a=f5113yIGAAAA:8 a=xDnjWU2VxAcA:10 a=3ROhxo7VqVMA:10 a=TBVoxVdAAAAA:8 a=GhZ5P8ky69gA:10 a=im9ohVDU96_d9SCtUSUA:9 a=rW6DTWptwo0A:10 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=virtuousgeek.org; s=default; h=Message-Id:Date:Subject:To:From; bh=IrMwHZkCOIAQbdxWcR3y9GVuYaE95+3JwEJn9JWQZAs=; b=kJLQ2IPeEnsI0ZmkYWqFQJ9yhyv3xLLw23eu5bgeanExEJg3rRHW6sCDlvGgYcj63Vw/phDrmlUNHl9sRpdV4+gO4s6AlbfB3qhW6luZzrqghOM5d8U4XMcTEjY6LFzs; Received: from [67.161.37.189] (port=56306 helo=localhost.localdomain) by box514.bluehost.com with esmtpsa (TLSv1.2:CAMELLIA256-SHA:256) (Exim 4.82) (envelope-from ) id 1WUgih-00041t-RJ for intel-gfx@lists.freedesktop.org; Mon, 31 Mar 2014 12:14:03 -0600 From: Jesse Barnes To: intel-gfx@lists.freedesktop.org Date: Mon, 31 Mar 2014 11:13:55 -0700 Message-Id: <1396289637-1013-1-git-send-email-jbarnes@virtuousgeek.org> X-Mailer: git-send-email 1.8.4.2 X-Identified-User: {10642:box514.bluehost.com:virtuous:virtuousgeek.org} {sentby:smtp auth 67.161.37.189 authed with jbarnes@virtuousgeek.org} Subject: [Intel-gfx] [PATCH 1/3] drm/i915: add PWM and BLC assertion checks X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP To make sure we properly follow the enable/disable sequences. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_dp.c | 62 ++++++++++++++++++++++++++++++++++++-- drivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/intel_panel.c | 5 ++- 3 files changed, 65 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index bf73771..b6f7087 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -301,6 +301,20 @@ static u32 _pp_stat_reg(struct intel_dp *intel_dp) return VLV_PIPE_PP_STATUS(vlv_power_sequencer_pipe(intel_dp)); } +static void assert_pwm(struct intel_connector *connector, + bool expected_state) +{ + bool state; + + state = intel_panel_get_backlight(connector); + + WARN(state != expected_state, "pwm state failure, expected %d, found " + "%d\n", expected_state, state); +} + +#define assert_pwm_enabled(c) assert_pwm((c), true) +#define assert_pwm_disabled(c) assert_pwm((c), false) + static bool edp_have_panel_power(struct intel_dp *intel_dp) { struct drm_device *dev = intel_dp_to_dev(intel_dp); @@ -884,6 +898,8 @@ static void intel_dp_mode_set(struct intel_encoder *encoder) struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode; + assert_pwm_disabled(intel_dp->attached_connector); + /* * There are four kinds of DP registers: * @@ -1167,6 +1183,23 @@ static void edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync) } } +/* + * For this and the disable sequence below, Google for actual eDP LCD timing + * diagrams or check the eDP spec. Below is for reference on asserts and + * does not contain Tx values for delays between steps. + * + * For panel on, the sequence should be: + * - LCD power supply on (PP regs or VDD AUX) + * - eDP should display black at this point + * - HPD (if present) should go high + * - AUX channel becomes available + * - link training begins + * - LED backlight power on + * - LED PWM_EN goes high, duty cycle >min (PWM regs) + * - link training completes + * - LED_EN goes high (PP BLC_EN bit) + */ + void intel_edp_panel_on(struct intel_dp *intel_dp) { struct drm_device *dev = intel_dp_to_dev(intel_dp); @@ -1212,6 +1245,19 @@ void intel_edp_panel_on(struct intel_dp *intel_dp) } } +/* + * For panel off the sequence should be: + * - LED_EN goes low (BLC_EN in our PP regs) + * - LED PWM_EN goes low (PWM duty cycle 0 and PWM enable = 0) + * - eDP should display black video at this point + * - LED VCCS goes low (power for backlight) + * - DP link goes to idle or off + * - AUX goes down + * - HPD line (if present) drops to low + * - eDP black video stops + * - LCD power supply shuts down (PP regs and VDD AUX) + */ + void intel_edp_panel_off(struct intel_dp *intel_dp) { struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); @@ -1231,11 +1277,17 @@ void intel_edp_panel_off(struct intel_dp *intel_dp) WARN(!intel_dp->want_panel_vdd, "Need VDD to turn off panel\n"); + /* By this time the PWM and BLC bits should be off already */ + assert_pwm_disabled(intel_dp->attached_connector); + pp = ironlake_get_pp_control(intel_dp); + + WARN(pp & EDP_BLC_ENABLE, + "backlight controller still on at panel off time\n"); + /* We need to switch off panel power _and_ force vdd, for otherwise some * panels get very unhappy and cease to work. */ - pp &= ~(POWER_TARGET_ON | PANEL_POWER_RESET | EDP_FORCE_VDD | - EDP_BLC_ENABLE); + pp &= ~(POWER_TARGET_ON | PANEL_POWER_RESET | EDP_FORCE_VDD); pp_ctrl_reg = _pp_ctrl_reg(intel_dp); @@ -1271,6 +1323,9 @@ void intel_edp_backlight_on(struct intel_dp *intel_dp) * allowing it to appear. */ wait_backlight_on(intel_dp); + + assert_pwm_enabled(intel_dp->attached_connector); + pp = ironlake_get_pp_control(intel_dp); pp |= EDP_BLC_ENABLE; @@ -1292,6 +1347,9 @@ void intel_edp_backlight_off(struct intel_dp *intel_dp) if (!is_edp(intel_dp)) return; + /* PWM must still be enabled here */ + assert_pwm_enabled(intel_dp->attached_connector); + intel_panel_disable_backlight(intel_dp->attached_connector); DRM_DEBUG_KMS("\n"); diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 9002e77..0e91c40 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -861,6 +861,7 @@ void intel_gmch_panel_fitting(struct intel_crtc *crtc, int fitting_mode); void intel_panel_set_backlight(struct intel_connector *connector, u32 level, u32 max); +u32 intel_panel_get_backlight(struct intel_connector *connector); int intel_panel_setup_backlight(struct drm_connector *connector); void intel_panel_enable_backlight(struct intel_connector *connector); void intel_panel_disable_backlight(struct intel_connector *connector); diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c index cb05840..21c5e6f 100644 --- a/drivers/gpu/drm/i915/intel_panel.c +++ b/drivers/gpu/drm/i915/intel_panel.c @@ -384,6 +384,9 @@ static u32 _vlv_get_backlight(struct drm_device *dev, enum pipe pipe) { struct drm_i915_private *dev_priv = dev->dev_private; + if (I915_READ(VLV_BLC_PWM_CTL2(pipe) & BLM_PWM_ENABLE)) + return 0; + return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK; } @@ -395,7 +398,7 @@ static u32 vlv_get_backlight(struct intel_connector *connector) return _vlv_get_backlight(dev, pipe); } -static u32 intel_panel_get_backlight(struct intel_connector *connector) +u32 intel_panel_get_backlight(struct intel_connector *connector) { struct drm_device *dev = connector->base.dev; struct drm_i915_private *dev_priv = dev->dev_private;