From patchwork Tue Apr 1 18:37:17 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paulo Zanoni X-Patchwork-Id: 3925281 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id C17D69F2F7 for ; Tue, 1 Apr 2014 18:37:51 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id EA4E5201FE for ; Tue, 1 Apr 2014 18:37:50 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 19CBB20240 for ; Tue, 1 Apr 2014 18:37:50 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 976A96E7F4; Tue, 1 Apr 2014 11:37:49 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-yh0-f41.google.com (mail-yh0-f41.google.com [209.85.213.41]) by gabe.freedesktop.org (Postfix) with ESMTP id 26BBF6E7FA for ; Tue, 1 Apr 2014 11:37:48 -0700 (PDT) Received: by mail-yh0-f41.google.com with SMTP id v1so9571729yhn.0 for ; Tue, 01 Apr 2014 11:37:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=6JSmWOovwTqHihlQ2b+hYJJu2xGX9kQu71dFYGnzsok=; b=v332+bhXdb+NW0sm9VcKZkdBRfFCQNNjQVTX5Yw/EJrxpnFuV+6DDohEsUlqJDcM1m zXHSk4vGPGTwnhn2Kez7I8O9Ign+SqegCJ0LPbjs2hCUEaM29s9wbCSTq/0NFDfhdNrm 3TrA5BsEulCUfjfQca43cgr1Cm8d3gNr3b+7ym7xnBoxt/YGtFno4O+OA4Th3gcwoCUF vOBPw3TDlRSCtqE5uCP9+olrrnCDjkplYpDHmwHf3fR+CDY4lJ+j1yhh+QrJD1Qtkib5 mnNFsVUzV+Z2/ZEZQxNf90J0sPRFMHWb0PIzixlTkut0A0UHt6hF9Xgiu2aKT17MN6v/ Dt1A== X-Received: by 10.236.216.73 with SMTP id f69mr45807705yhp.37.1396377467745; Tue, 01 Apr 2014 11:37:47 -0700 (PDT) Received: from localhost.localdomain ([177.42.1.121]) by mx.google.com with ESMTPSA id t58sm31738185yho.20.2014.04.01.11.37.46 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 01 Apr 2014 11:37:47 -0700 (PDT) From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Tue, 1 Apr 2014 15:37:17 -0300 Message-Id: <1396377447-2177-10-git-send-email-przanoni@gmail.com> X-Mailer: git-send-email 1.8.5.3 In-Reply-To: <1396377447-2177-1-git-send-email-przanoni@gmail.com> References: <1396377447-2177-1-git-send-email-przanoni@gmail.com> Cc: Paulo Zanoni Subject: [Intel-gfx] [PATCH 09/19] drm/i915: fix SERR_INT init/reset code X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-3.9 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RCVD_IN_SORBS_WEB, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Paulo Zanoni The SERR_INT register is very similar to the other IIR registers, so let's zero it at preinstall/uninstall and WARN for a non-zero value at postinstall, just like we do with the other IIR registers. For this one, there's no need to double-clear since it can't store more than one interrupt. v2: - Remove the is_zero assertion (Ben). Reviewed-by: Ben Widawsky Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_irq.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 65e901e..bfb7e14 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -2872,6 +2872,10 @@ static void ibx_irq_preinstall(struct drm_device *dev) return; GEN5_IRQ_RESET(SDE); + + if (HAS_PCH_CPT(dev) || HAS_PCH_LPT(dev)) + I915_WRITE(SERR_INT, 0xffffffff); + /* * SDEIER is also touched by the interrupt handler to work around missed * PCH interrupts. Hence we can't update it after the interrupt handler @@ -3002,14 +3006,11 @@ static void ibx_irq_postinstall(struct drm_device *dev) if (HAS_PCH_NOP(dev)) return; - if (HAS_PCH_IBX(dev)) { + if (HAS_PCH_IBX(dev)) mask = SDE_GMBUS | SDE_AUX_MASK | SDE_POISON; - } else { + else mask = SDE_GMBUS_CPT | SDE_AUX_MASK_CPT; - I915_WRITE(SERR_INT, I915_READ(SERR_INT)); - } - GEN5_ASSERT_IIR_IS_ZERO(SDEIIR); I915_WRITE(SDEIMR, ~mask); } @@ -3353,7 +3354,7 @@ static void ironlake_irq_uninstall(struct drm_device *dev) GEN5_IRQ_RESET(SDE); if (HAS_PCH_CPT(dev) || HAS_PCH_LPT(dev)) - I915_WRITE(SERR_INT, I915_READ(SERR_INT)); + I915_WRITE(SERR_INT, 0xffffffff); } static void i8xx_irq_preinstall(struct drm_device * dev)