From patchwork Tue Apr 1 18:37:10 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paulo Zanoni X-Patchwork-Id: 3925211 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 952649F2F7 for ; Tue, 1 Apr 2014 18:37:45 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B62EE203B6 for ; Tue, 1 Apr 2014 18:37:44 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 33FF120380 for ; Tue, 1 Apr 2014 18:37:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 74ADD6E588; Tue, 1 Apr 2014 11:37:42 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-yh0-f53.google.com (mail-yh0-f53.google.com [209.85.213.53]) by gabe.freedesktop.org (Postfix) with ESMTP id B71D76E588 for ; Tue, 1 Apr 2014 11:37:39 -0700 (PDT) Received: by mail-yh0-f53.google.com with SMTP id v1so9483349yhn.12 for ; Tue, 01 Apr 2014 11:37:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=OmMM5tsKtZDCOwwE8OHTuNpaBGD64vyD5bGSV44GA/s=; b=LPd/apILojQ1jJwh0sVYoc66JEAw9YEq+b/D/wjOmueLzZgHAumPaIut7sVK6N4bB8 UqA+Jq0BTPQhlioluKMnlNhRw28kvIXhAt+K9nJDclOrn9TUe6JAss0wSi16Z4DOiXJi cyoV89voKOX4RXr79uWB1epqGYBfnbdAYMWGgNDnK7uLC6TzySr4AEZ/XEQBvb0xh+UZ iSPDRebmI0RXtM/UyhNBbJMMrzrAivAcCeOSC+MHIFU7l/HmJFqok3pbtVR7YuWcwk+m lNdfpGgqXjcM6WLjiHZw6u3ys5zEtZK6Ow0KZ+MhSyh0OWO7fHqPXbModCFVe9hHffQZ ofjA== X-Received: by 10.236.175.37 with SMTP id y25mr14384505yhl.100.1396377458329; Tue, 01 Apr 2014 11:37:38 -0700 (PDT) Received: from localhost.localdomain ([177.42.1.121]) by mx.google.com with ESMTPSA id t58sm31738185yho.20.2014.04.01.11.37.37 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 01 Apr 2014 11:37:37 -0700 (PDT) From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Tue, 1 Apr 2014 15:37:10 -0300 Message-Id: <1396377447-2177-3-git-send-email-przanoni@gmail.com> X-Mailer: git-send-email 1.8.5.3 In-Reply-To: <1396377447-2177-1-git-send-email-przanoni@gmail.com> References: <1396377447-2177-1-git-send-email-przanoni@gmail.com> Cc: Paulo Zanoni Subject: [Intel-gfx] [PATCH 02/19] drm/i915: also use GEN5_IRQ_INIT with south display interrupts X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-3.9 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RCVD_IN_SORBS_WEB, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Paulo Zanoni This interrupt gets initialized with a different IER value, so it was not using the macro. The problem is that we plan to modify the macro to make it do additional things, and we want the SDE interrupts updated too. So let's make sure we call the macro, then, after it, we do the necessary SDE-specific changes. Reviewed-by: Ben Widawsky Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_irq.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index f487068..af1d43c 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -2827,8 +2827,7 @@ static void ibx_irq_preinstall(struct drm_device *dev) if (HAS_PCH_NOP(dev)) return; - /* south display irq */ - I915_WRITE(SDEIMR, 0xffffffff); + GEN5_IRQ_INIT(SDE); /* * SDEIER is also touched by the interrupt handler to work around missed * PCH interrupts. Hence we can't update it after the interrupt handler