From patchwork Tue Apr 1 18:37:11 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paulo Zanoni X-Patchwork-Id: 3925241 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id DAC049F7F5 for ; Tue, 1 Apr 2014 18:37:45 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id ECC5E203B8 for ; Tue, 1 Apr 2014 18:37:44 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id C399120397 for ; Tue, 1 Apr 2014 18:37:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 984296E7F3; Tue, 1 Apr 2014 11:37:42 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-yk0-f171.google.com (mail-yk0-f171.google.com [209.85.160.171]) by gabe.freedesktop.org (Postfix) with ESMTP id 46E6B6E588 for ; Tue, 1 Apr 2014 11:37:41 -0700 (PDT) Received: by mail-yk0-f171.google.com with SMTP id q9so7860164ykb.30 for ; Tue, 01 Apr 2014 11:37:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=CkF138JZnbdMNEEAk4SdUTnNTOG9yWN1zV2gn3coGLE=; b=Ig688LzXaoGO6gGSHXBAVk1jownZYAtzYZWirnR/UqvXhHNN8rChPDeAto0BID/0o1 yyhBDKbhkjsXFAMSpnYhC052KCgFn4DNAJFqslIpfM9qDKU5J14sbv7UkKbU+8/ycJzr lb5rCc33apIpoGOIarXkW6YIrgOfOT25s2vgEICBPB9WklDERwadq4q93GnJkz4fDv4q WzDVj9w/7Cg635lbfAzwkjHTeyK6ioWuNjDXop4JiYgB3gGydTT80pQtY/ohV3R2sfee hmJO5U7li7AUDU9Tqiw98UVsNNT1F8HQ7VAn4ZFSyzjxuccdysYQCMtTsQIlfGZVfx/S NHxQ== X-Received: by 10.236.30.230 with SMTP id k66mr47216220yha.57.1396377459794; Tue, 01 Apr 2014 11:37:39 -0700 (PDT) Received: from localhost.localdomain ([177.42.1.121]) by mx.google.com with ESMTPSA id t58sm31738185yho.20.2014.04.01.11.37.38 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 01 Apr 2014 11:37:39 -0700 (PDT) From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Tue, 1 Apr 2014 15:37:11 -0300 Message-Id: <1396377447-2177-4-git-send-email-przanoni@gmail.com> X-Mailer: git-send-email 1.8.5.3 In-Reply-To: <1396377447-2177-1-git-send-email-przanoni@gmail.com> References: <1396377447-2177-1-git-send-email-przanoni@gmail.com> Cc: Paulo Zanoni Subject: [Intel-gfx] [PATCH 03/19] drm/i915: use GEN8_IRQ_INIT on GEN5 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-3.9 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RCVD_IN_SORBS_WEB, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Paulo Zanoni And rename it to GEN5_IRQ_INIT. We have discussed doing equivalent changes on July 2013, and I even sent a patch series for this: "[PATCH 00/15] Unify interrupt register init/reset". Now that the BDW code was merged, I have one more argument in favor of these changes. Here's what really changes with the Gen 5 IRQ init code: - We now clear the IIR registers at preinstall (they are also cleared at postinstall, but we will change that later). - We have an additional POSTING_READ at the IMR register. v2: - Fix typo in commit message. - Add POSTING_READ calls to the macros (Ben, Daniel, Jani). Reviewed-by: Ben Widawsky (v1) Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_irq.c | 46 +++++++++++++++++------------------------ 1 file changed, 19 insertions(+), 27 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index af1d43c..bc7e230 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -80,10 +80,25 @@ static const u32 hpd_status_i915[] = { /* i915 and valleyview are the same */ [HPD_PORT_D] = PORTD_HOTPLUG_INT_STATUS }; +/* IIR can theoretically queue up two events. Be paranoid. */ +#define GEN8_IRQ_INIT_NDX(type, which) do { \ + I915_WRITE(GEN8_##type##_IMR(which), 0xffffffff); \ + POSTING_READ(GEN8_##type##_IMR(which)); \ + I915_WRITE(GEN8_##type##_IER(which), 0); \ + I915_WRITE(GEN8_##type##_IIR(which), 0xffffffff); \ + POSTING_READ(GEN8_##type##_IIR(which)); \ + I915_WRITE(GEN8_##type##_IIR(which), 0xffffffff); \ + POSTING_READ(GEN8_##type##_IIR(which)); \ +} while (0) + #define GEN5_IRQ_INIT(type) do { \ I915_WRITE(type##IMR, 0xffffffff); \ + POSTING_READ(type##IMR); \ I915_WRITE(type##IER, 0); \ - POSTING_READ(type##IER); \ + I915_WRITE(type##IIR, 0xffffffff); \ + POSTING_READ(type##IIR); \ + I915_WRITE(type##IIR, 0xffffffff); \ + POSTING_READ(type##IIR); \ } while (0) /* For display hotplug interrupt */ @@ -2899,25 +2914,6 @@ static void gen8_irq_preinstall(struct drm_device *dev) I915_WRITE(GEN8_MASTER_IRQ, 0); POSTING_READ(GEN8_MASTER_IRQ); - /* IIR can theoretically queue up two events. Be paranoid */ -#define GEN8_IRQ_INIT_NDX(type, which) do { \ - I915_WRITE(GEN8_##type##_IMR(which), 0xffffffff); \ - POSTING_READ(GEN8_##type##_IMR(which)); \ - I915_WRITE(GEN8_##type##_IER(which), 0); \ - I915_WRITE(GEN8_##type##_IIR(which), 0xffffffff); \ - POSTING_READ(GEN8_##type##_IIR(which)); \ - I915_WRITE(GEN8_##type##_IIR(which), 0xffffffff); \ - } while (0) - -#define GEN8_IRQ_INIT(type) do { \ - I915_WRITE(GEN8_##type##_IMR, 0xffffffff); \ - POSTING_READ(GEN8_##type##_IMR); \ - I915_WRITE(GEN8_##type##_IER, 0); \ - I915_WRITE(GEN8_##type##_IIR, 0xffffffff); \ - POSTING_READ(GEN8_##type##_IIR); \ - I915_WRITE(GEN8_##type##_IIR, 0xffffffff); \ - } while (0) - GEN8_IRQ_INIT_NDX(GT, 0); GEN8_IRQ_INIT_NDX(GT, 1); GEN8_IRQ_INIT_NDX(GT, 2); @@ -2927,13 +2923,9 @@ static void gen8_irq_preinstall(struct drm_device *dev) GEN8_IRQ_INIT_NDX(DE_PIPE, pipe); } - GEN8_IRQ_INIT(DE_PORT); - GEN8_IRQ_INIT(DE_MISC); - GEN8_IRQ_INIT(PCU); -#undef GEN8_IRQ_INIT -#undef GEN8_IRQ_INIT_NDX - - POSTING_READ(GEN8_PCU_IIR); + GEN5_IRQ_INIT(GEN8_DE_PORT_); + GEN5_IRQ_INIT(GEN8_DE_MISC_); + GEN5_IRQ_INIT(GEN8_PCU_); ibx_irq_preinstall(dev); }