From patchwork Tue Apr 8 17:47:41 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Todd Previte X-Patchwork-Id: 3950191 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 9DF269F499 for ; Tue, 8 Apr 2014 17:48:11 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DFCCE203B5 for ; Tue, 8 Apr 2014 17:48:10 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 07C4F203AC for ; Tue, 8 Apr 2014 17:48:10 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 99D2A6E4E7; Tue, 8 Apr 2014 10:48:09 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-pb0-f42.google.com (mail-pb0-f42.google.com [209.85.160.42]) by gabe.freedesktop.org (Postfix) with ESMTP id DAC846E4E7 for ; Tue, 8 Apr 2014 10:48:08 -0700 (PDT) Received: by mail-pb0-f42.google.com with SMTP id rr13so1363912pbb.1 for ; Tue, 08 Apr 2014 10:48:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ty+ufgAZOpWdw1hwQuJsGON/TtVfXzEMCpFkMgE1EgQ=; b=vhq2gj1h+SqN2H1CNttgaz4sX6nsdkhb4NCWVJHVSISmSx2lsbdv5cc/7orbHVC+2P wM9zSehu5DvajXB3za4SYdgs6nvuPo4ESax8H9gvk003Ivf9dEAPmYDF28+UvYArbOQ9 dCP4WjsZruwl7GiipvIOzh5o3g8Dogt+WLOuyJPhDeWvlS2yxt0H/3iNSW4N2c7BcYxN NWlm1qoQ+93MHNicltvqVd3bjuwII4ewslLKBsll0bj5hLRQCvmh7LmEyeMm5DmBEiYX LVDeIeNsKZL9Gay9ttyYCPKUQjYw82Xg4gr/3oCuYOoyJuVBdgGeqX8wNlTlfgd3rvoX suJQ== X-Received: by 10.68.171.229 with SMTP id ax5mr6140499pbc.125.1396979288719; Tue, 08 Apr 2014 10:48:08 -0700 (PDT) Received: from localhost.localdomain (ip72-201-95-47.ph.ph.cox.net. [72.201.95.47]) by mx.google.com with ESMTPSA id e6sm5973219pbg.4.2014.04.08.10.48.06 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 08 Apr 2014 10:48:07 -0700 (PDT) From: Todd Previte To: intel-gfx@lists.freedesktop.org Date: Tue, 8 Apr 2014 10:47:41 -0700 Message-Id: <1396979263-3245-4-git-send-email-tprevite@gmail.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1396979263-3245-1-git-send-email-tprevite@gmail.com> References: <1396979263-3245-1-git-send-email-tprevite@gmail.com> Subject: [Intel-gfx] [PATCH 3/5] drm/i915: Displayport - Add function to enable/disable scrambling on the main link X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Adds a function to enable and disable scrambling directly for the main link. This is functionality required to establish more fine-grained control over the Displayport interface, both for operational reliability and compliance testing. Signed-off-by: Todd Previte --- drivers/gpu/drm/i915/intel_dp.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index c865c32..1209de8 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -2372,6 +2372,33 @@ intel_dp_set_signal_levels(struct intel_dp *intel_dp, uint32_t *DP) *DP = (*DP & ~mask) | signal_levels; } +void intel_dp_scrambler_disable(bool disable, struct intel_dp *intel_dp) +{ + struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); + struct drm_device *dev = intel_dig_port->base.base.dev; + struct drm_i915_private *dev_priv = dev->dev_private; + + // SNB is 0x40000. ILK is 0x4400 + // IVB is 0x64000, HSW+ is 0x64040/0x64140 + uint32_t ctrl_reg, reg_value; + + if (HAS_DDI(dev)) + ctrl_reg = DP_TP_CTL(intel_dig_port->port); + else + ctrl_reg = intel_dp->output_reg; + + reg_value = I915_READ(ctrl_reg); + + // Scrambling is bit 7 (scrambling on == 0) + if (disable) + reg_value |= DP_TP_CTL_SCRAMBLE_DISABLE; + else + reg_value &= ~DP_TP_CTL_SCRAMBLE_DISABLE; + + I915_WRITE(ctrl_reg, reg_value); + POSTING_READ(ctrl_reg); +} + bool intel_dp_verify_link_status(DPLinkTrainingState state, uint8_t lane_count,