From patchwork Tue Apr 15 02:38:48 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhao, Yakui" X-Patchwork-Id: 3988191 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 6D93FC0DA3 for ; Tue, 15 Apr 2014 01:31:42 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 83F3F201DC for ; Tue, 15 Apr 2014 01:31:41 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 6091D201F9 for ; Tue, 15 Apr 2014 01:31:40 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F03026E14C; Mon, 14 Apr 2014 18:31:39 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [143.182.124.21]) by gabe.freedesktop.org (Postfix) with ESMTP id 50B516E136 for ; Mon, 14 Apr 2014 18:31:37 -0700 (PDT) Received: from azsmga001.ch.intel.com ([10.2.17.19]) by azsmga101.ch.intel.com with ESMTP; 14 Apr 2014 18:31:36 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.97,861,1389772800"; d="scan'208";a="419000837" Received: from hb-ws.sh.intel.com (HELO localhost.localdomain.sh.intel.com) ([10.239.13.109]) by azsmga001.ch.intel.com with ESMTP; 14 Apr 2014 18:31:22 -0700 From: Zhao Yakui To: intel-gfx@lists.freedesktop.org Date: Tue, 15 Apr 2014 10:38:48 +0800 Message-Id: <1397529528-7114-3-git-send-email-yakui.zhao@intel.com> X-Mailer: git-send-email 1.7.10.1 In-Reply-To: <1397529528-7114-1-git-send-email-yakui.zhao@intel.com> References: <1397529528-7114-1-git-send-email-yakui.zhao@intel.com> Subject: [Intel-gfx] [PATCH I-g-t V2 2/2] tests/gem_dummy_reloc_loop: Add one subtest based on multi drm_fd to test CPU<->GPU sync under multi BSD rings X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The Broadwell GT3 machine has two independent BSD rings in kernel driver while it is transparent to the user-space driver. In such case it needs to check the CPU<->GPU sync for the second BSD ring. V1->V2: Follow Daniel's comment to add one subtext instead of one individual test case, which is used to test the CPU<->GPU sync under multi BSD rings Signed-off-by: Zhao Yakui Reviewed-by: Imre Deak --- tests/gem_dummy_reloc_loop.c | 102 +++++++++++++++++++++++++++++++++++++++++- 1 file changed, 101 insertions(+), 1 deletion(-) diff --git a/tests/gem_dummy_reloc_loop.c b/tests/gem_dummy_reloc_loop.c index a61b59b..660d8e1 100644 --- a/tests/gem_dummy_reloc_loop.c +++ b/tests/gem_dummy_reloc_loop.c @@ -48,6 +48,13 @@ static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; static drm_intel_bo *target_buffer; +#define NUM_FD 50 + +static int mfd[NUM_FD]; +static drm_intel_bufmgr *mbufmgr[NUM_FD]; +static struct intel_batchbuffer *mbatch[NUM_FD]; +static drm_intel_bo *mbuffer[NUM_FD]; + /* * Testcase: Basic check of ring<->cpu sync using a dummy reloc * @@ -124,6 +131,50 @@ dummy_reloc_loop_random_ring(int num_rings) } } +static void +dummy_reloc_loop_random_ring_multi_fd(int num_rings) +{ + int i; + struct intel_batchbuffer *saved_batch; + + saved_batch = batch; + + srandom(0xdeadbeef); + + for (i = 0; i < 0x100000; i++) { + int mindex; + int ring = random() % num_rings + 1; + + mindex = random() % NUM_FD; + batch = mbatch[mindex]; + + if (ring == I915_EXEC_RENDER) { + BEGIN_BATCH(4); + OUT_BATCH(MI_COND_BATCH_BUFFER_END | MI_DO_COMPARE); + OUT_BATCH(0xffffffff); /* compare dword */ + OUT_RELOC(mbuffer[mindex], I915_GEM_DOMAIN_RENDER, + I915_GEM_DOMAIN_RENDER, 0); + OUT_BATCH(MI_NOOP); + ADVANCE_BATCH(); + } else { + BEGIN_BATCH(4); + OUT_BATCH(MI_FLUSH_DW | 1); + OUT_BATCH(0); /* reserved */ + OUT_RELOC(mbuffer[mindex], I915_GEM_DOMAIN_RENDER, + I915_GEM_DOMAIN_RENDER, 0); + OUT_BATCH(MI_NOOP | (1<<22) | (0xf)); + ADVANCE_BATCH(); + } + intel_batchbuffer_flush_on_ring(batch, ring); + + drm_intel_bo_map(target_buffer, 0); + // map to force waiting on rendering + drm_intel_bo_unmap(target_buffer); + } + + batch = saved_batch; +} + int fd; int devid; int num_rings; @@ -133,6 +184,7 @@ igt_main igt_skip_on_simulation(); igt_fixture { + int i; fd = drm_open_any(); devid = intel_get_drm_devid(fd); num_rings = gem_get_num_rings(fd); @@ -148,6 +200,35 @@ igt_main target_buffer = drm_intel_bo_alloc(bufmgr, "target bo", 4096, 4096); igt_assert(target_buffer); + + /* Create multi drm_fd and map one gem object to multi gem_contexts */ + { + unsigned int target_flink; + char buffer_name[32]; + if (dri_bo_flink(target_buffer, &target_flink)) { + printf("fail to get flink for target buffer\n"); + igt_assert(0); + } + for (i = 0; i < NUM_FD; i++) { + mfd[i] = 0; + mbufmgr[i] = NULL; + mbuffer[i] = NULL; + } + for (i = 0; i < NUM_FD; i++) { + sprintf(buffer_name, "Target buffer %d\n", i); + mfd[i] = drm_open_any(); + mbufmgr[i] = drm_intel_bufmgr_gem_init(mfd[i], 4096); + igt_assert(mbufmgr[i]); + drm_intel_bufmgr_gem_enable_reuse(mbufmgr[i]); + mbatch[i] = intel_batchbuffer_alloc(mbufmgr[i], devid); + igt_assert(mbufmgr[i]); + mbuffer[i] = intel_bo_gem_create_from_name( + mbufmgr[i], + buffer_name, + target_flink); + igt_assert(mbuffer[i]); + } + } } igt_subtest("render") { @@ -190,8 +271,27 @@ igt_main printf("dummy loop run on random rings completed\n"); } } - + igt_subtest("mixed_multi_fd") { + if (num_rings > 1) { + sleep(2); + printf("running dummy loop on random rings based on " + "multi drm_fd\n"); + dummy_reloc_loop_random_ring_multi_fd(num_rings); + printf("dummy loop run on random rings based on " + "multi drm_fd completed\n"); + } + } igt_fixture { + int i; + /* Free the buffer/batchbuffer/buffer mgr for multi-fd */ + { + for (i = 0; i < NUM_FD; i++) { + dri_bo_unreference(mbuffer[i]); + intel_batchbuffer_free(mbatch[i]); + drm_intel_bufmgr_destroy(mbufmgr[i]); + close(mfd[i]); + } + } drm_intel_bo_unreference(target_buffer); intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr);