From patchwork Fri Apr 18 21:04:28 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rodrigo Vivi X-Patchwork-Id: 4018601 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id D8611C0DA2 for ; Fri, 18 Apr 2014 21:04:57 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 267352038D for ; Fri, 18 Apr 2014 21:04:57 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id ECC38203AB for ; Fri, 18 Apr 2014 21:04:55 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7CF738A3C7; Fri, 18 Apr 2014 14:04:55 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-pb0-f44.google.com (mail-pb0-f44.google.com [209.85.160.44]) by gabe.freedesktop.org (Postfix) with ESMTP id 779006ECF8 for ; Fri, 18 Apr 2014 14:04:51 -0700 (PDT) Received: by mail-pb0-f44.google.com with SMTP id rp16so1806926pbb.31 for ; Fri, 18 Apr 2014 14:04:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=tczqNLXUsM+Y6lnZlNGlRG8JK6u5QyYJdA9Bze56mng=; b=NlWnw70axFDZWcB1rpu8YzfLNobtAw3vjgSK+c7XHIhTyVYrEVhBL6eva6jZKRxioO z2ubIZtKoHfT+/ubb29xhtEo/Zbqs4TsouWxdN4keK29l/QrgjKXVtxDgg0RwzHIHNfS fb2Y4p9aXcK/Ms7KHm/JYHcg1zN7GapXxmLSGt3RKb8ZrFr5tMWnHGRg+YmdOkC4x5yj 0HnnbpUfaf9K4HCEFU+TuIh5EXZhVsOOOlgx/JNuXizhCYJCozM5G70EJTPC2HEMKZNf ISjeI6bXzhUQy1hyCSNZg57pdmSdyfZxSbMn3yJ1/CvAU/iSJy46VEv2sWIWweOUi9d7 z38g== X-Received: by 10.67.14.98 with SMTP id ff2mr23997668pad.101.1397855091358; Fri, 18 Apr 2014 14:04:51 -0700 (PDT) Received: from localhost (jfdmzpr03-ext.jf.intel.com. [134.134.139.72]) by mx.google.com with ESMTPSA id sv10sm61751121pbc.74.2014.04.18.14.04.50 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 18 Apr 2014 14:04:50 -0700 (PDT) From: Rodrigo Vivi To: intel-gfx@lists.freedesktop.org Date: Fri, 18 Apr 2014 18:04:28 -0300 Message-Id: <1397855070-4480-13-git-send-email-rodrigo.vivi@gmail.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1397855070-4480-1-git-send-email-rodrigo.vivi@gmail.com> References: <1397855070-4480-1-git-send-email-rodrigo.vivi@gmail.com> Cc: Ben Widawsky , Ben Widawsky Subject: [Intel-gfx] [PATCH 12/14] drm/i915/bdw: enable eDRAM. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Ben Widawsky The same register exists for querying and programming eDRAM AKA eLLC. So we can simply use it. For now, use all the same defaults as we had for Haswell, since like Haswell, I have no further details. I do not actually have a part with eDRAM, so I cannot test this. Signed-off-by: Ben Widawsky Signed-off-by: Rodrigo Vivi Reviewed-by: Brad Volkin --- drivers/gpu/drm/i915/intel_uncore.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index c8969e3..0e6b502 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -373,7 +373,7 @@ void intel_uncore_early_sanitize(struct drm_device *dev) if (HAS_FPGA_DBG_UNCLAIMED(dev)) __raw_i915_write32(dev_priv, FPGA_DBG, FPGA_DBG_RM_NOCLAIM); - if (IS_HASWELL(dev) && + if ((IS_HASWELL(dev) || IS_BROADWELL(dev)) && (__raw_i915_read32(dev_priv, HSW_EDRAM_PRESENT) == 1)) { /* The docs do not explain exactly how the calculation can be * made. It is somewhat guessable, but for now, it's always