From patchwork Mon Apr 21 08:04:14 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: deepak.s@linux.intel.com X-Patchwork-Id: 4022911 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id AA925BFF02 for ; Mon, 21 Apr 2014 08:04:55 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D0442202FE for ; Mon, 21 Apr 2014 08:04:54 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id F2EA2202C8 for ; Mon, 21 Apr 2014 08:04:53 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7B0B46E2DC; Mon, 21 Apr 2014 01:04:53 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id A13F96E2DE for ; Mon, 21 Apr 2014 01:04:51 -0700 (PDT) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga102.fm.intel.com with ESMTP; 21 Apr 2014 01:04:51 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.97,895,1389772800"; d="scan'208";a="516564031" Received: from ds1-mobl1.gar.corp.intel.com (HELO deepaks.iind.intel.com) ([10.223.184.130]) by fmsmga001.fm.intel.com with ESMTP; 21 Apr 2014 01:04:48 -0700 From: deepak.s@linux.intel.com To: intel-gfx@lists.freedesktop.org Date: Mon, 21 Apr 2014 13:34:14 +0530 Message-Id: <1398067454-7581-11-git-send-email-deepak.s@linux.intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1398067454-7581-2-git-send-email-deepak.s@linux.intel.com> References: <1398067454-7581-2-git-send-email-deepak.s@linux.intel.com> Subject: [Intel-gfx] [PATCH 10/10] drm/i915/chv: Freq(opcode) request value for CHV. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Deepak S On CHV, All the freq request should be even. S0, we need to make sure we request the opcode accordingly. Signed-off-by: Deepak S Reviewed-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_drv.h | 9 +++++++++ drivers/gpu/drm/i915/i915_irq.c | 4 ++-- 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index ead2714..5435d87 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2641,6 +2641,15 @@ timespec_to_jiffies_timeout(const struct timespec *value) return min_t(unsigned long, MAX_JIFFY_OFFSET, j + 1); } +/* rps/turbo related */ +static inline int i915_rps_freq_change(struct drm_device *dev) +{ + if (IS_CHERRYVIEW(dev)) + return 2; + + return 1; +} + /* * If you need to wait X milliseconds between events A and B, but event B * doesn't happen exactly after event A, you record the timestamp (jiffies) of diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index cf29668..11538fe 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -1190,7 +1190,7 @@ static void gen6_pm_rps_work(struct work_struct *work) if (adj > 0) adj *= 2; else - adj = 1; + adj = i915_rps_freq_change(dev_priv->dev); new_delay = dev_priv->rps.cur_freq + adj; /* @@ -1209,7 +1209,7 @@ static void gen6_pm_rps_work(struct work_struct *work) if (adj < 0) adj *= 2; else - adj = -1; + adj = -1 * i915_rps_freq_change(dev_priv->dev); new_delay = dev_priv->rps.cur_freq + adj; } else { /* unknown event */ new_delay = dev_priv->rps.cur_freq;