| Message ID | 1399412453-28379-1-git-send-email-abdiel.janulgue@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, May 07, 2014 at 12:40:53AM +0300, Abdiel Janulgue wrote: > Add test that makes sure RS bit only gets executed on BDW and > on the render ring. > > Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com> > --- > tests/gem_exec_params.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/tests/gem_exec_params.c b/tests/gem_exec_params.c > index 769969d..a3f765b 100644 > --- a/tests/gem_exec_params.c > +++ b/tests/gem_exec_params.c > @@ -193,6 +193,17 @@ igt_main > execbuf.num_cliprects = 0; > } > > + igt_subtest("rs-not-gen8") { > + igt_require(intel_gen(devid) != 8); > + execbuf.flags = I915_EXEC_RENDER | I915_EXEC_RESOURCE_STREAMER; > + RUN_FAIL(EINVAL); > + } > + > + igt_subtest("invalid-rs-ring") { > + execbuf.flags = I915_EXEC_RESOURCE_STREAMER; > + RUN_FAIL(EINVAL); See Chris comment, but 0 is actually _not_ an invalid ring, but aliases RCS. Yeah, we have a fun api. So this should actually suceed, at least on bdw (and -EINVAL everywhere else). So you need to explicitly test with some other ring like VCS (I915_EXEC_BSD). -Daniel > + } > + > #define DIRT(name) \ > igt_subtest(#name "-dirt") { \ > execbuf.flags = 0; \ > -- > 1.7.9.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Wed, May 07, 2014 at 12:40:13AM +0200, Daniel Vetter wrote: > On Wed, May 07, 2014 at 12:40:53AM +0300, Abdiel Janulgue wrote: > > Add test that makes sure RS bit only gets executed on BDW and > > on the render ring. > > > > Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com> > > --- > > tests/gem_exec_params.c | 11 +++++++++++ > > 1 file changed, 11 insertions(+) > > > > diff --git a/tests/gem_exec_params.c b/tests/gem_exec_params.c > > index 769969d..a3f765b 100644 > > --- a/tests/gem_exec_params.c > > +++ b/tests/gem_exec_params.c > > @@ -193,6 +193,17 @@ igt_main > > execbuf.num_cliprects = 0; > > } > > > > + igt_subtest("rs-not-gen8") { > > + igt_require(intel_gen(devid) != 8); > > + execbuf.flags = I915_EXEC_RENDER | I915_EXEC_RESOURCE_STREAMER; > > + RUN_FAIL(EINVAL); > > + } > > + > > + igt_subtest("invalid-rs-ring") { > > + execbuf.flags = I915_EXEC_RESOURCE_STREAMER; > > + RUN_FAIL(EINVAL); > > See Chris comment, but 0 is actually _not_ an invalid ring, but aliases > RCS. Yeah, we have a fun api. So this should actually suceed, at least on > bdw (and -EINVAL everywhere else). > > So you need to explicitly test with some other ring like VCS > (I915_EXEC_BSD). Also you didn't update the invalid-flag subtest ... I wonder why that didn't fail on bdw. -Daniel
diff --git a/tests/gem_exec_params.c b/tests/gem_exec_params.c index 769969d..a3f765b 100644 --- a/tests/gem_exec_params.c +++ b/tests/gem_exec_params.c @@ -193,6 +193,17 @@ igt_main execbuf.num_cliprects = 0; } + igt_subtest("rs-not-gen8") { + igt_require(intel_gen(devid) != 8); + execbuf.flags = I915_EXEC_RENDER | I915_EXEC_RESOURCE_STREAMER; + RUN_FAIL(EINVAL); + } + + igt_subtest("invalid-rs-ring") { + execbuf.flags = I915_EXEC_RESOURCE_STREAMER; + RUN_FAIL(EINVAL); + } + #define DIRT(name) \ igt_subtest(#name "-dirt") { \ execbuf.flags = 0; \
Add test that makes sure RS bit only gets executed on BDW and on the render ring. Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com> --- tests/gem_exec_params.c | 11 +++++++++++ 1 file changed, 11 insertions(+)