@@ -48,7 +48,7 @@ struct i915_params i915 __read_mostly = {
.disable_display = 0,
.enable_cmd_parser = 1,
.disable_vtd_wa = 0,
- .use_mmio_flip = 0,
+ .use_mmio_flip = -1,
};
module_param_named(modeset, i915.modeset, int, 0400);
@@ -159,4 +159,5 @@ MODULE_PARM_DESC(enable_cmd_parser,
"Enable command parsing (1=enabled [default], 0=disabled)");
module_param_named(use_mmio_flip, i915.use_mmio_flip, bool, 0600);
-MODULE_PARM_DESC(use_mmio_flip, "use MMIO flips (default: false)");
+MODULE_PARM_DESC(use_mmio_flip, "use MMIO page flips "
+ "(default: -1 (use per-chip default))");
@@ -9193,6 +9193,18 @@ static bool intel_use_mmio_flip(struct drm_device *dev)
if (i915.use_mmio_flip == 0)
return false;
+ /* On Valleyview, use MMIO flips by default, for Media Power Well
+ * residency optimization. The other alternative of having Render
+ * ring based flip calls is not being used, as the performance(FPS)
+ * of certain 3D Apps gets severly affected.
+ */
+ if (i915.use_mmio_flip == -1) {
+ if (IS_VALLEYVIEW(dev))
+ return true;
+ else
+ return false;
+ }
+
if (INTEL_INFO(dev)->gen >= 5)
return true;
else