From patchwork Thu May 22 14:36:32 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: sourab.gupta@intel.com X-Patchwork-Id: 4223321 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id C1C739F23C for ; Thu, 22 May 2014 14:36:10 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id F3EE9201C7 for ; Thu, 22 May 2014 14:36:09 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id D6CFD202EB for ; Thu, 22 May 2014 14:36:08 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 770336EC2A; Thu, 22 May 2014 07:36:08 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTP id 783666EC2B for ; Thu, 22 May 2014 07:36:07 -0700 (PDT) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga103.fm.intel.com with ESMTP; 22 May 2014 07:32:03 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.98,887,1392192000"; d="scan'208";a="536064348" Received: from sourabgu-desktop.iind.intel.com ([10.223.82.83]) by fmsmga001.fm.intel.com with ESMTP; 22 May 2014 07:36:05 -0700 From: sourab.gupta@intel.com To: intel-gfx@lists.freedesktop.org Date: Thu, 22 May 2014 20:06:32 +0530 Message-Id: <1400769393-15403-3-git-send-email-sourab.gupta@intel.com> X-Mailer: git-send-email 1.8.5.1 In-Reply-To: <1400769393-15403-1-git-send-email-sourab.gupta@intel.com> References: <1400608955.9396.88.camel@sourabgu-desktop> <1400769393-15403-1-git-send-email-sourab.gupta@intel.com> Cc: Akash Goel , Sourab Gupta Subject: [Intel-gfx] [PATCH 2/3] drm/i915: Default to mmio flips on VLV X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Sourab Gupta This patch is for using mmio flips by default on VLV. The module parameter controlling use of MMIO flips allows us to control the default behaviour, which is set true for VLV and false elsewhere. Signed-off-by: Sourab Gupta --- drivers/gpu/drm/i915/i915_params.c | 5 +++-- drivers/gpu/drm/i915/intel_display.c | 12 ++++++++++++ 2 files changed, 15 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c index e0d44df..a99accc 100644 --- a/drivers/gpu/drm/i915/i915_params.c +++ b/drivers/gpu/drm/i915/i915_params.c @@ -48,7 +48,7 @@ struct i915_params i915 __read_mostly = { .disable_display = 0, .enable_cmd_parser = 1, .disable_vtd_wa = 0, - .use_mmio_flip = 0, + .use_mmio_flip = -1, }; module_param_named(modeset, i915.modeset, int, 0400); @@ -159,4 +159,5 @@ MODULE_PARM_DESC(enable_cmd_parser, "Enable command parsing (1=enabled [default], 0=disabled)"); module_param_named(use_mmio_flip, i915.use_mmio_flip, bool, 0600); -MODULE_PARM_DESC(use_mmio_flip, "use MMIO flips (default: false)"); +MODULE_PARM_DESC(use_mmio_flip, "use MMIO page flips " + "(default: -1 (use per-chip default))"); diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index a29552d..b3e7fc6 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -9193,6 +9193,18 @@ static bool intel_use_mmio_flip(struct drm_device *dev) if (i915.use_mmio_flip == 0) return false; + /* On Valleyview, use MMIO flips by default, for Media Power Well + * residency optimization. The other alternative of having Render + * ring based flip calls is not being used, as the performance(FPS) + * of certain 3D Apps gets severly affected. + */ + if (i915.use_mmio_flip == -1) { + if (IS_VALLEYVIEW(dev)) + return true; + else + return false; + } + if (INTEL_INFO(dev)->gen >= 5) return true; else