From patchwork Tue May 27 23:50:14 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rodrigo Vivi X-Patchwork-Id: 4251951 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id C11E19F1E7 for ; Tue, 27 May 2014 23:49:36 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0650F20212 for ; Tue, 27 May 2014 23:49:36 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 322F02017D for ; Tue, 27 May 2014 23:49:35 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2DF416E4DA; Tue, 27 May 2014 16:49:34 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-pb0-f47.google.com (mail-pb0-f47.google.com [209.85.160.47]) by gabe.freedesktop.org (Postfix) with ESMTP id 1C4B06E4DA for ; Tue, 27 May 2014 16:49:33 -0700 (PDT) Received: by mail-pb0-f47.google.com with SMTP id rp16so10035343pbb.6 for ; Tue, 27 May 2014 16:49:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=zpjjpODjZnmnR7U75c1NKW4vBuCFl1Jz5mu+MNbA2LM=; b=DTpRaIofbd7tI9QtozWKJejSLxlYGd32Ac8N4PhP0nfk9eNpA33Rk20j3+jXLj5fDw SkdxbsH+DL2Nzhyh1kHdOy30UgpHJkprGWbciQeTjfM7u8tD15K9Sa+sQOncrebHohup EL+LExKEDw3d7DIoANJ/9Thy5HSmv3uCWJmMo/2zpRnmxEk3iZ57TcF1jVBtExn3eCCM YUgf3ZOqAWfh/THg01aA3hhPQZjPDgDmW89zhicsz5k3Uq94JguJCpfrV2l3dIcwNrpC tr1vR1jt3eibZdz8O0+mN+q+0jWBBb2mtGJ1UDgp8zi6M5Q08Ew0eh+j/h+xs6V2TjbN KvVA== X-Received: by 10.68.202.194 with SMTP id kk2mr40263457pbc.156.1401234572926; Tue, 27 May 2014 16:49:32 -0700 (PDT) Received: from localhost (jfdmzpr05-ext.jf.intel.com. [134.134.139.74]) by mx.google.com with ESMTPSA id ie9sm79770786pad.29.2014.05.27.16.49.31 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 27 May 2014 16:49:32 -0700 (PDT) From: Rodrigo Vivi To: intel-gfx@lists.freedesktop.org Date: Tue, 27 May 2014 16:50:14 -0700 Message-Id: <1401234614-25220-1-git-send-email-rodrigo.vivi@gmail.com> X-Mailer: git-send-email 1.9.0 In-Reply-To: References: Subject: [Intel-gfx] [PATCH] drm/i915: Update PSR on resume. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Some registers set during setup might not be persistent after suspend/resume. This was causing bugs for some people that was unable to get PSR entry state after resume cycle. v2: Adding some comments and better commit message explaining why this is needed. Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i915/i915_suspend.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c index 56785e8..1923708 100644 --- a/drivers/gpu/drm/i915/i915_suspend.c +++ b/drivers/gpu/drm/i915/i915_suspend.c @@ -288,6 +288,12 @@ static void i915_restore_display(struct drm_device *dev) I915_WRITE(PP_CONTROL, dev_priv->regfile.savePP_CONTROL); } + /* Forcing a full init sequence after resume to make sure all + * registers are properly set. Some might not be persistent after + * suspend/resume cycle. */ + dev_priv->psr.setup_done = false; + intel_edp_psr_update(dev); + /* only restore FBC info on the platform that supports FBC*/ intel_disable_fbc(dev);