Message ID | 1401261122-23593-3-git-send-email-sourab.gupta@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Wed, May 28, 2014 at 12:42:02PM +0530, sourab.gupta@intel.com wrote: > From: Sourab Gupta <sourab.gupta@intel.com> > > This patch is for using mmio flips by default on VLV. > The module parameter controlling use of MMIO flips allows us to > control the default behaviour, which is set true for VLV and false > elsewhere. > > Signed-off-by: Sourab Gupta <sourab.gupta@intel.com> > --- > drivers/gpu/drm/i915/i915_params.c | 5 +++-- > drivers/gpu/drm/i915/intel_display.c | 12 ++++++++++++ > 2 files changed, 15 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c > index e0d44df..a99accc 100644 > --- a/drivers/gpu/drm/i915/i915_params.c > +++ b/drivers/gpu/drm/i915/i915_params.c > @@ -48,7 +48,7 @@ struct i915_params i915 __read_mostly = { > .disable_display = 0, > .enable_cmd_parser = 1, > .disable_vtd_wa = 0, > - .use_mmio_flip = 0, > + .use_mmio_flip = -1, > }; > > module_param_named(modeset, i915.modeset, int, 0400); > @@ -159,4 +159,5 @@ MODULE_PARM_DESC(enable_cmd_parser, > "Enable command parsing (1=enabled [default], 0=disabled)"); > > module_param_named(use_mmio_flip, i915.use_mmio_flip, bool, 0600); > -MODULE_PARM_DESC(use_mmio_flip, "use MMIO flips (default: false)"); > +MODULE_PARM_DESC(use_mmio_flip, "use MMIO page flips " > + "(default: -1 (use per-chip default))"); > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index f11abfb..312a9a1 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -9197,6 +9197,18 @@ static bool intel_use_mmio_flip(struct drm_device *dev) > if (i915.use_mmio_flip == 0) > return false; > > + /* On Valleyview, use MMIO flips by default, for Media Power Well > + * residency optimization. The other alternative of having Render > + * ring based flip calls is not being used, as the performance(FPS) > + * of certain 3D Apps gets severly affected. > + */ Pray tell, what RCS flips? This seems to only tell one half of the story and would seem to imply that only using mmio for the BSD ring would be preferrable. The current override doesn't look useful enough to do an independent study of BCS vs mmio flips for all workloads. -Chris
From: Sourab Gupta <sourab.gupta@intel.com>
This patch series enables the framework for using MMIO flips in place of
Blitter ring based flips.
This is useful for Media power well residency optimization. These may be
enabled on architectures where Render and Blitter engines reside in different
power wells.
The blitter ring is currently being used just for command streamer based
flip calls. The decision to use MMIO flips can be made based on workloads to give
100% residency for Media power well.
Sourab Gupta (3):
drm/i915: Replaced Blitter ring based flips with MMIO flips
drm/i915: Selection of MMIO vs CS flip at page flip time
drm/i915: Make module param for MMIO flip selection as tristate
drivers/gpu/drm/i915/i915_dma.c | 1 +
drivers/gpu/drm/i915/i915_drv.h | 8 ++
drivers/gpu/drm/i915/i915_gem.c | 2 +-
drivers/gpu/drm/i915/i915_irq.c | 3 +
drivers/gpu/drm/i915/i915_params.c | 6 ++
drivers/gpu/drm/i915/intel_display.c | 173 ++++++++++++++++++++++++++++++++++-
drivers/gpu/drm/i915/intel_drv.h | 6 ++
7 files changed, 197 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c index e0d44df..a99accc 100644 --- a/drivers/gpu/drm/i915/i915_params.c +++ b/drivers/gpu/drm/i915/i915_params.c @@ -48,7 +48,7 @@ struct i915_params i915 __read_mostly = { .disable_display = 0, .enable_cmd_parser = 1, .disable_vtd_wa = 0, - .use_mmio_flip = 0, + .use_mmio_flip = -1, }; module_param_named(modeset, i915.modeset, int, 0400); @@ -159,4 +159,5 @@ MODULE_PARM_DESC(enable_cmd_parser, "Enable command parsing (1=enabled [default], 0=disabled)"); module_param_named(use_mmio_flip, i915.use_mmio_flip, bool, 0600); -MODULE_PARM_DESC(use_mmio_flip, "use MMIO flips (default: false)"); +MODULE_PARM_DESC(use_mmio_flip, "use MMIO page flips " + "(default: -1 (use per-chip default))"); diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index f11abfb..312a9a1 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -9197,6 +9197,18 @@ static bool intel_use_mmio_flip(struct drm_device *dev) if (i915.use_mmio_flip == 0) return false; + /* On Valleyview, use MMIO flips by default, for Media Power Well + * residency optimization. The other alternative of having Render + * ring based flip calls is not being used, as the performance(FPS) + * of certain 3D Apps gets severly affected. + */ + if (i915.use_mmio_flip == -1) { + if (IS_VALLEYVIEW(dev)) + return true; + else + return false; + } + if (INTEL_INFO(dev)->gen >= 5) return true; else