From patchwork Wed May 28 16:50:10 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jesse Barnes X-Patchwork-Id: 4256531 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 3687DBF90B for ; Wed, 28 May 2014 16:57:07 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3AD56201BA for ; Wed, 28 May 2014 16:57:06 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 80B292026C for ; Wed, 28 May 2014 16:57:04 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8BD8D6E8A8; Wed, 28 May 2014 09:57:03 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org X-Greylist: delayed 398 seconds by postgrey-1.34 at gabe; Wed, 28 May 2014 09:57:02 PDT Received: from qproxy1-pub.mail.unifiedlayer.com (qproxy1-pub.mail.unifiedlayer.com [173.254.64.10]) by gabe.freedesktop.org (Postfix) with SMTP id 3D7156E5BC for ; Wed, 28 May 2014 09:57:02 -0700 (PDT) Received: (qmail 11070 invoked by uid 0); 28 May 2014 16:50:22 -0000 Received: from unknown (HELO cmgw4) (10.0.90.85) by qproxy1.mail.unifiedlayer.com with SMTP; 28 May 2014 16:50:22 -0000 Received: from box514.bluehost.com ([74.220.219.114]) by cmgw4 with id 7UqJ1o00E2UhLwi01UqMwY; Wed, 28 May 2014 10:50:22 -0600 X-Authority-Analysis: v=2.1 cv=CpMsLBID c=1 sm=1 tr=0 a=9W6Fsu4pMcyimqnCr1W0/w==:117 a=9W6Fsu4pMcyimqnCr1W0/w==:17 a=cNaOj0WVAAAA:8 a=f5113yIGAAAA:8 a=9YrGgAuLoiMA:10 a=3ROhxo7VqVMA:10 a=TBVoxVdAAAAA:8 a=GhZ5P8ky69gA:10 a=noBwr2J6l1kA:10 a=bOTsHgkFPIrAhVtcR0kA:9 a=rW6DTWptwo0A:10 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=virtuousgeek.org; s=default; h=References:In-Reply-To:Message-Id:Date:Subject:To:From; bh=YXNnXXdSGPOkl8kze5VUqr3FjODTkXkEJ+q2g/jF/Nc=; b=BeuFhAr2tiot7ARzDx44qjiC9+gQGxtfK/K6Vbzn5Np0rg4QmAyG+icdcAw/vOHCmYzHL+5URdIYIGMJOCA2Dj12NrMOml9wEaYoH5kWYSRyE6Qk7XePCeoJC6FPMxjZ; Received: from [67.161.37.189] (port=39377 helo=localhost.localdomain) by box514.bluehost.com with esmtpsa (TLSv1.2:DHE-RSA-AES256-GCM-SHA384:256) (Exim 4.82) (envelope-from ) id 1Wph3R-00045H-1P for intel-gfx@lists.freedesktop.org; Wed, 28 May 2014 10:50:17 -0600 From: Jesse Barnes To: intel-gfx@lists.freedesktop.org Date: Wed, 28 May 2014 09:50:10 -0700 Message-Id: <1401295810-2081-2-git-send-email-jbarnes@virtuousgeek.org> X-Mailer: git-send-email 1.8.4.2 In-Reply-To: <1401295810-2081-1-git-send-email-jbarnes@virtuousgeek.org> References: <1401295810-2081-1-git-send-email-jbarnes@virtuousgeek.org> X-Identified-User: {10642:box514.bluehost.com:virtuous:virtuousgeek.org} {sentby:smtp auth 67.161.37.189 authed with jbarnes@virtuousgeek.org} Subject: [Intel-gfx] [PATCH 2/2] drm/i915: rename is_enabled to hw_state X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Mainly useful for catching all the callers in the previous patch. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_drv.h | 4 ++-- drivers/gpu/drm/i915/intel_pm.c | 22 +++++++++++----------- 2 files changed, 13 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 5d5e57d..3396a55 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -977,8 +977,8 @@ struct i915_power_well_ops { void (*disable)(struct drm_i915_private *dev_priv, struct i915_power_well *power_well); /* Returns the hw enabled state. */ - bool (*is_enabled)(struct drm_i915_private *dev_priv, - struct i915_power_well *power_well); + bool (*hw_state)(struct drm_i915_private *dev_priv, + struct i915_power_well *power_well); }; /* Power well structure for haswell */ diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 09a3677..a29ef24 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -5538,8 +5538,8 @@ void intel_suspend_hw(struct drm_device *dev) * enable it, so check if it's enabled and also check if we've requested it to * be enabled. */ -static bool hsw_power_well_enabled(struct drm_i915_private *dev_priv, - struct i915_power_well *power_well) +static bool hsw_power_hw_state(struct drm_i915_private *dev_priv, + struct i915_power_well *power_well) { return I915_READ(HSW_PWR_WELL_DRIVER) == (HSW_PWR_WELL_ENABLE_REQUEST | HSW_PWR_WELL_STATE_ENABLED); @@ -5716,8 +5716,8 @@ static void i9xx_always_on_power_well_noop(struct drm_i915_private *dev_priv, { } -static bool i9xx_always_on_power_well_enabled(struct drm_i915_private *dev_priv, - struct i915_power_well *power_well) +static bool i9xx_always_on_power_hw_state(struct drm_i915_private *dev_priv, + struct i915_power_well *power_well) { return true; } @@ -5819,8 +5819,8 @@ static void vlv_power_well_disable(struct drm_i915_private *dev_priv, vlv_set_power_well(dev_priv, power_well, false); } -static bool vlv_power_well_enabled(struct drm_i915_private *dev_priv, - struct i915_power_well *power_well) +static bool vlv_power_hw_state(struct drm_i915_private *dev_priv, + struct i915_power_well *power_well) { int power_well_id = power_well->data; bool enabled = false; @@ -5904,7 +5904,7 @@ static void vlv_display_power_well_disable(struct drm_i915_private *dev_priv, static void check_power_well_state(struct drm_i915_private *dev_priv, struct i915_power_well *power_well) { - bool enabled = power_well->ops->is_enabled(dev_priv, power_well); + bool enabled = power_well->ops->hw_state(dev_priv, power_well); if (power_well->always_on || !i915.disable_power_well) { if (!enabled) @@ -6070,7 +6070,7 @@ static const struct i915_power_well_ops i9xx_always_on_power_well_ops = { .sync_hw = i9xx_always_on_power_well_noop, .enable = i9xx_always_on_power_well_noop, .disable = i9xx_always_on_power_well_noop, - .is_enabled = i9xx_always_on_power_well_enabled, + .hw_state = i9xx_always_on_power_hw_state, }; static struct i915_power_well i9xx_always_on_power_well[] = { @@ -6086,7 +6086,7 @@ static const struct i915_power_well_ops hsw_power_well_ops = { .sync_hw = hsw_power_well_sync_hw, .enable = hsw_power_well_enable, .disable = hsw_power_well_disable, - .is_enabled = hsw_power_well_enabled, + .hw_state = hsw_power_hw_state, }; static struct i915_power_well hsw_power_wells[] = { @@ -6121,14 +6121,14 @@ static const struct i915_power_well_ops vlv_display_power_well_ops = { .sync_hw = vlv_power_well_sync_hw, .enable = vlv_display_power_well_enable, .disable = vlv_display_power_well_disable, - .is_enabled = vlv_power_well_enabled, + .hw_state = vlv_power_hw_state, }; static const struct i915_power_well_ops vlv_dpio_power_well_ops = { .sync_hw = vlv_power_well_sync_hw, .enable = vlv_power_well_enable, .disable = vlv_power_well_disable, - .is_enabled = vlv_power_well_enabled, + .hw_state = vlv_power_hw_state, }; static struct i915_power_well vlv_power_wells[] = {