@@ -29,6 +29,8 @@
#include <drm/i915_drm.h>
#include "i915_drv.h"
+#define GEN8_COLOR_BLT_CMD (2<<29 | 0x50<<22)
+
#define COLOR_BLT_CMD (2<<29 | 0x40<<22)
#define BLT_WRITE_ALPHA (1<<21)
#define BLT_WRITE_RGB (1<<20)
@@ -100,18 +102,35 @@ int i915_gem_exec_clear_object(struct drm_i915_gem_object *obj)
if (ret)
goto unpin;
- ret = intel_ring_begin(ring, 6);
- if (ret)
- goto unpin;
+ if (IS_GEN8(dev)) {
+ ret = intel_ring_begin(ring, 8);
+ if (ret)
+ goto unpin;
- intel_ring_emit(ring, COLOR_BLT_CMD | BLT_WRITE_RGBA | (5-2));
- intel_ring_emit(ring, BPP_32 | ROP_FILL_COPY | PAGE_SIZE);
- intel_ring_emit(ring, obj->base.size >> PAGE_SHIFT << 16 | PAGE_SIZE);
- intel_ring_emit(ring, i915_gem_obj_ggtt_offset(obj));
- intel_ring_emit(ring, 0);
- intel_ring_emit(ring, MI_NOOP);
+ intel_ring_emit(ring, GEN8_COLOR_BLT_CMD | BLT_WRITE_RGBA | (7-2));
+ intel_ring_emit(ring, BPP_32 | ROP_FILL_COPY | PAGE_SIZE);
+ intel_ring_emit(ring, 0);
+ intel_ring_emit(ring, obj->base.size >> PAGE_SHIFT << 16 | PAGE_SIZE / 4);
+ intel_ring_emit(ring, i915_gem_obj_ggtt_offset(obj));
+ intel_ring_emit(ring, 0);
+ intel_ring_emit(ring, 0);
+ intel_ring_emit(ring, MI_NOOP);
+
+ __intel_ring_advance(ring);
+ } else {
+ ret = intel_ring_begin(ring, 6);
+ if (ret)
+ goto unpin;
- __intel_ring_advance(ring);
+ intel_ring_emit(ring, COLOR_BLT_CMD | BLT_WRITE_RGBA | (5-2));
+ intel_ring_emit(ring, BPP_32 | ROP_FILL_COPY | PAGE_SIZE);
+ intel_ring_emit(ring, obj->base.size >> PAGE_SHIFT << 16 | PAGE_SIZE);
+ intel_ring_emit(ring, i915_gem_obj_ggtt_offset(obj));
+ intel_ring_emit(ring, 0);
+ intel_ring_emit(ring, MI_NOOP);
+
+ __intel_ring_advance(ring);
+ }
i915_gem_exec_dirty_object(obj, ring);
unpin: