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[5/6] drm/i915: Update Displayport compliance testing for link training

Message ID 1403647974-42377-6-git-send-email-tprevite@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Todd Previte June 24, 2014, 10:12 p.m. UTC
Adds basic link training test functionality for Displayport compliance.

Signed-off-by: Todd Previte <tprevite@gmail.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)
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Patch

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 4c5d229..95bd27a 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -3405,6 +3405,30 @@  static uint8_t
 intel_dp_autotest_link_training(struct intel_dp *intel_dp)
 {
 	uint8_t test_result = DP_TEST_NAK;
+	uint8_t rxdata[2];
+	uint8_t link_status[DP_LINK_STATUS_SIZE];
+	int bytes_ret = 0;
+
+	/* Read test parameters */
+	bytes_ret = drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_LINK_RATE, rxdata, 2);
+
+	/* Set link rate directly */
+	intel_dp->link_bw = rxdata[0];
+	/* Preserve 7:5 when setting lane count */
+	intel_dp->lane_count &= 0xE0;
+	intel_dp->lane_count |= rxdata[1];
+
+	DRM_DEBUG_KMS("Displayport: Link training testing - %d lanes @ %02x link rate\n", intel_dp->lane_count, intel_dp->link_bw);
+
+	/* Train the link */
+	intel_dp_start_link_train(intel_dp);
+	intel_dp_complete_link_train(intel_dp);
+	intel_dp_stop_link_train(intel_dp);
+
+	// Check link status for successful completion
+	if (drm_dp_channel_eq_ok(link_status, intel_dp->lane_count))
+		test_result = true;
+
 	return test_result;
 }