@@ -1361,6 +1361,18 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
qe.params.mask = mask;
qe.params.mode = mode;
+ /* Hack for testing pre-empting prior to having an official priority API */
+ if (qe.params.args_flags & I915_EXEC_PREEMPT) {
+#ifdef CONFIG_DRM_I915_SCHEDULER_PREEMPTION
+ struct i915_scheduler *scheduler = dev_priv->scheduler;
+ qe.priority += scheduler->priority_level_preempt;
+#else
+ DRM_DEBUG("Buffer flags 0x%X includes PREEMPT!\n",
+ qe.params.args_flags);
+#endif
+ }
+ /* Hack for testing pre-empting prior to having an official priority API */
+
#ifdef CONFIG_DRM_I915_SCHEDULER
/*
* Save away the list of objects used by this batch buffer for the
@@ -694,6 +694,11 @@ struct drm_i915_gem_execbuffer2 {
#define I915_EXEC_BLT (3<<0)
#define I915_EXEC_VEBOX (4<<0)
+/* Pre-emption flag
+ * If this flag is set, this batchbuffer preempts those already submitted
+ */
+#define I915_EXEC_PREEMPT (1<<5)
+
/* Used for switching the constants addressing mode on gen4+ RENDER ring.
* Gen6+ only supports relative addressing to dynamic state (default) and
* absolute addressing.
From: John Harrison <John.C.Harrison@Intel.com> In order to test pre-emption, a flag has been added to the execbuffer() API to explicitly request that a given batch buffer is made pre-emptive. This is purely a temporary measure to allow an IGT test to queue pre-emptive and non-preemptive work loads. Note that the final solution will be to add an IOCTL to set the priority of a batch buffer (work in progress elsewhere). The scheduler will then decide to pre-empt or not based on the assigned priority level. --- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 12 ++++++++++++ include/uapi/drm/i915_drm.h | 5 +++++ 2 files changed, 17 insertions(+)