From patchwork Thu Jul 3 21:33:04 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Rodrigo Vivi X-Patchwork-Id: 4477231 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 06FD6BEEAA for ; Thu, 3 Jul 2014 21:33:32 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 43B2C2038C for ; Thu, 3 Jul 2014 21:33:31 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 7495820253 for ; Thu, 3 Jul 2014 21:33:30 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E92596E785; Thu, 3 Jul 2014 14:33:29 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-pd0-f177.google.com (mail-pd0-f177.google.com [209.85.192.177]) by gabe.freedesktop.org (Postfix) with ESMTP id C77AE6E785 for ; Thu, 3 Jul 2014 14:33:28 -0700 (PDT) Received: by mail-pd0-f177.google.com with SMTP id y10so835533pdj.22 for ; Thu, 03 Jul 2014 14:33:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type:content-transfer-encoding; bh=tjTmkpTmsWCzXNVVkg9S1D8VfFbF+yOxcxenfqftM8k=; b=r8pz2s8ukkV96GekHQKEUsMQI3HkiZJ0F17ngqRbr2YhSyXV31KxuT1Ogy+z6vynxv F/QaPJxMBgReI8J5gIxAltF+A5nTWcE/YlBVYNWkU+UIrs0Em0duRImmqmE8k7ApDKge VeDhY6M8TZMYFWWsjVYhP+Uk3uff+SFn7SeI7/+Ol5iIG7IhXZP9lpDZwo068UnAXLrU klcmfmSwEOVubQV4YkBcw4o4echM5qvAizvzLaU8Eh8dHHSxvqUA1trKKRUkL38L/GIx LtlOE53b3npQNh9BNtpcOBXvUX5zyHeMLKV/lkEprP1za1jRU1c4PwjonkRiOFYXs2/+ 1vxw== X-Received: by 10.66.164.234 with SMTP id yt10mr6977817pab.65.1404423208704; Thu, 03 Jul 2014 14:33:28 -0700 (PDT) Received: from rdvivi-bratislava.home (static-50-43-14-60.bvtn.or.frontiernet.net. [50.43.14.60]) by mx.google.com with ESMTPSA id js3sm42016885pbb.50.2014.07.03.14.33.26 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 03 Jul 2014 14:33:28 -0700 (PDT) From: Rodrigo Vivi X-Google-Original-From: Rodrigo Vivi To: intel-gfx@lists.freedesktop.org Date: Thu, 3 Jul 2014 17:33:04 -0400 Message-Id: <1404423186-2019-9-git-send-email-rodrigo.vivi@intel.com> X-Mailer: git-send-email 1.9.0 In-Reply-To: <1404423186-2019-1-git-send-email-rodrigo.vivi@intel.com> References: <1404423186-2019-1-git-send-email-rodrigo.vivi@intel.com> MIME-Version: 1.0 Cc: Rodrigo Vivi Subject: [Intel-gfx] [PATCH 08/10] drm/i915: Don't promote UC to WT automagically X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Ville Syrjälä If the object is already UC leave it as UC instead of automagically promoting it to WT in i915_gem_object_pin_to_display_plane() when the hardware is WT capable. Supposedly the user wanted UC for a reason, so let's respect that. Signed-off-by: Ville Syrjälä Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i915/i915_gem.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index f6d1238..b705d2d 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -3838,6 +3838,7 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj, struct intel_engine_cs *pipelined) { u32 old_read_domains, old_write_domain; + unsigned int cache_level; bool was_pin_display; int ret; @@ -3862,8 +3863,12 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj, * of uncaching, which would allow us to flush all the LLC-cached data * with that bit in the PTE to main memory with just one PIPE_CONTROL. */ - ret = i915_gem_object_set_cache_level(obj, - HAS_WT(obj->base.dev) ? I915_CACHE_WT : I915_CACHE_NONE); + if (HAS_WT(obj->base.dev) && obj->cache_level != I915_CACHE_NONE) + cache_level = I915_CACHE_WT; + else + cache_level = I915_CACHE_NONE; + + ret = i915_gem_object_set_cache_level(obj, cache_level); if (ret) goto err_unpin_display;