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[5/7] drm/i915: CHV GPU frequency to opcode functions

Message ID 1404978387-28180-6-git-send-email-deepak.s@linux.intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

deepak.s@linux.intel.com July 10, 2014, 7:46 a.m. UTC
From: Deepak S <deepak.s@linux.intel.com>

Adding chv specific fre/encode conversion.

Signed-off-by: Deepak S <deepak.s@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 68 +++++++++++++++++++++++++++++++++++------
 1 file changed, 59 insertions(+), 9 deletions(-)
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Patch

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 6c19ce5..6abd05b 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6975,26 +6975,76 @@  int vlv_freq_opcode(struct drm_i915_private *dev_priv, int val)
 	return DIV_ROUND_CLOSEST(4 * mul * val, dev_priv->mem_freq) + 0xbd - 6;
 }
 
-int intel_gpu_freq(struct drm_i915_private *dev_priv, int val)
+int chv_gpu_freq(struct drm_i915_private *dev_priv, int val)
 {
-	int ret;
+	int div, freq;
 
-	if (!IS_VALLEYVIEW(dev_priv->dev))
+	switch (dev_priv->rps.cz_freq) {
+	case 200:
+		div = 5;
+		break;
+	case 267:
+		div = 6;
+		break;
+	case 320:
+	case 333:
+	case 400:
+		div = 8;
+		break;
+	default:
 		return -1;
+	}
 
-	ret = vlv_gpu_freq(dev_priv, val);
+	freq = (DIV_ROUND_CLOSEST((dev_priv->rps.cz_freq * val), 2 * div) / 2);
 
-	return ret;
+	return freq;
 }
 
-int intel_freq_opcode(struct drm_i915_private *dev_priv, int val)
+int chv_freq_opcode(struct drm_i915_private *dev_priv, int val)
 {
-	int ret;
+	int mul, opcode;
 
-	if (!IS_VALLEYVIEW(dev_priv->dev))
+	switch (dev_priv->rps.cz_freq) {
+	case 200:
+		mul = 5;
+		break;
+	case 267:
+		mul = 6;
+		break;
+	case 320:
+	case 333:
+	case 400:
+		mul = 8;
+		break;
+	default:
 		return -1;
+	}
+
+	opcode = (DIV_ROUND_CLOSEST((val * 2 * mul), dev_priv->rps.cz_freq) * 2);
+
+	return opcode;
+}
+
+int intel_gpu_freq(struct drm_i915_private *dev_priv, int val)
+{
+	int ret = -1;
+
+	if (IS_CHERRYVIEW(dev_priv->dev))
+		ret = chv_gpu_freq(dev_priv, val);
+	else if (IS_VALLEYVIEW(dev_priv->dev))
+		ret = vlv_gpu_freq(dev_priv, val);
+
+	return ret;
+}
+
+int intel_freq_opcode(struct drm_i915_private *dev_priv, int val)
+{
+	int ret = -1;
 
-	ret = vlv_freq_opcode(dev_priv, val);
+	if (IS_CHERRYVIEW(dev_priv->dev))
+		ret = chv_freq_opcode(dev_priv, val);
+	else if (IS_VALLEYVIEW(dev_priv->dev))
+		ret = vlv_freq_opcode(dev_priv, val);
 
 	return ret;
 }