From patchwork Thu Jul 10 07:46:25 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: deepak.s@linux.intel.com X-Patchwork-Id: 4512231 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 82E59BEEE9 for ; Wed, 9 Jul 2014 07:51:56 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id AF834202E5 for ; Wed, 9 Jul 2014 07:51:55 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id B579E201F7 for ; Wed, 9 Jul 2014 07:51:54 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3C1928A0BA; Wed, 9 Jul 2014 00:51:54 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 8DDB58A0BA for ; Wed, 9 Jul 2014 00:51:53 -0700 (PDT) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP; 09 Jul 2014 00:51:53 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.01,630,1400050800"; d="scan'208";a="559262645" Received: from deepu.iind.intel.com ([10.223.82.136]) by fmsmga001.fm.intel.com with ESMTP; 09 Jul 2014 00:51:52 -0700 From: deepak.s@linux.intel.com To: intel-gfx@lists.freedesktop.org Date: Thu, 10 Jul 2014 13:16:25 +0530 Message-Id: <1404978387-28180-6-git-send-email-deepak.s@linux.intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1404978387-28180-1-git-send-email-deepak.s@linux.intel.com> References: <1404978387-28180-1-git-send-email-deepak.s@linux.intel.com> Subject: [Intel-gfx] [PATCH 5/7] drm/i915: CHV GPU frequency to opcode functions X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-1.7 required=5.0 tests=BAYES_00, DATE_IN_FUTURE_12_24, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Deepak S Adding chv specific fre/encode conversion. Signed-off-by: Deepak S --- drivers/gpu/drm/i915/intel_pm.c | 68 +++++++++++++++++++++++++++++++++++------ 1 file changed, 59 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 6c19ce5..6abd05b 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -6975,26 +6975,76 @@ int vlv_freq_opcode(struct drm_i915_private *dev_priv, int val) return DIV_ROUND_CLOSEST(4 * mul * val, dev_priv->mem_freq) + 0xbd - 6; } -int intel_gpu_freq(struct drm_i915_private *dev_priv, int val) +int chv_gpu_freq(struct drm_i915_private *dev_priv, int val) { - int ret; + int div, freq; - if (!IS_VALLEYVIEW(dev_priv->dev)) + switch (dev_priv->rps.cz_freq) { + case 200: + div = 5; + break; + case 267: + div = 6; + break; + case 320: + case 333: + case 400: + div = 8; + break; + default: return -1; + } - ret = vlv_gpu_freq(dev_priv, val); + freq = (DIV_ROUND_CLOSEST((dev_priv->rps.cz_freq * val), 2 * div) / 2); - return ret; + return freq; } -int intel_freq_opcode(struct drm_i915_private *dev_priv, int val) +int chv_freq_opcode(struct drm_i915_private *dev_priv, int val) { - int ret; + int mul, opcode; - if (!IS_VALLEYVIEW(dev_priv->dev)) + switch (dev_priv->rps.cz_freq) { + case 200: + mul = 5; + break; + case 267: + mul = 6; + break; + case 320: + case 333: + case 400: + mul = 8; + break; + default: return -1; + } + + opcode = (DIV_ROUND_CLOSEST((val * 2 * mul), dev_priv->rps.cz_freq) * 2); + + return opcode; +} + +int intel_gpu_freq(struct drm_i915_private *dev_priv, int val) +{ + int ret = -1; + + if (IS_CHERRYVIEW(dev_priv->dev)) + ret = chv_gpu_freq(dev_priv, val); + else if (IS_VALLEYVIEW(dev_priv->dev)) + ret = vlv_gpu_freq(dev_priv, val); + + return ret; +} + +int intel_freq_opcode(struct drm_i915_private *dev_priv, int val) +{ + int ret = -1; - ret = vlv_freq_opcode(dev_priv, val); + if (IS_CHERRYVIEW(dev_priv->dev)) + ret = chv_freq_opcode(dev_priv, val); + else if (IS_VALLEYVIEW(dev_priv->dev)) + ret = vlv_freq_opcode(dev_priv, val); return ret; }