From patchwork Tue Jul 15 16:20:38 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michel Thierry X-Patchwork-Id: 4555361 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id C3F529F3BC for ; Tue, 15 Jul 2014 16:20:54 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CD96520123 for ; Tue, 15 Jul 2014 16:20:53 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id B2B2420120 for ; Tue, 15 Jul 2014 16:20:52 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 437DE6E511; Tue, 15 Jul 2014 09:20:52 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 4FEE36E511 for ; Tue, 15 Jul 2014 09:20:51 -0700 (PDT) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga102.jf.intel.com with ESMTP; 15 Jul 2014 09:15:15 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.01,666,1400050800"; d="scan'208";a="573515193" Received: from michelth-linux.iwi.intel.com ([172.28.253.148]) by orsmga002.jf.intel.com with ESMTP; 15 Jul 2014 09:20:49 -0700 From: Michel Thierry To: intel-gfx@lists.freedesktop.org Date: Tue, 15 Jul 2014 17:20:38 +0100 Message-Id: <1405441251-28744-2-git-send-email-michel.thierry@intel.com> X-Mailer: git-send-email 1.9.0 In-Reply-To: <1405441251-28744-1-git-send-email-michel.thierry@intel.com> References: <1405441251-28744-1-git-send-email-michel.thierry@intel.com> Subject: [Intel-gfx] [PATCH 01/14] drm/i915: Split up do_switch X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Ben Widawsky There are two important reasons for this patch. It should make the existing code a lot more readable. It also makes the next patch much easier to understand in my opinion. There are 2 main variables that effect this function, leaving 4 permutations: ring: RCS vs !RCS PPGTT: full or not I didn't find extracting the full PPGTT usage to be very beneficial at this point, but it may be in the future. This was originally recommended by Daniel Vetter, and in this case, I agree. There was no intentional behavioral change. v2: Change the pin assertion to be GGTT only. This is more accurate. Signed-off-by: Ben Widawsky v3: Make it work again after legacy_hw_ctx & user_handle changes. Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/i915_gem_context.c | 79 +++++++++++++++++++++------------ 1 file changed, 51 insertions(+), 28 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c index de72a28..a1dc885 100644 --- a/drivers/gpu/drm/i915/i915_gem_context.c +++ b/drivers/gpu/drm/i915/i915_gem_context.c @@ -611,31 +611,58 @@ mi_set_context(struct intel_engine_cs *ring, return ret; } -static int do_switch(struct intel_engine_cs *ring, - struct intel_context *to) +static void do_switch_fini_common(struct intel_engine_cs *ring, + struct intel_context *from, + struct intel_context *to) +{ + if (likely(from)) + i915_gem_context_unreference(from); + i915_gem_context_reference(to); + ring->last_context = to; +} + +static int do_switch_xcs(struct intel_engine_cs *ring, + struct intel_context *from, + struct intel_context *to) +{ + struct drm_device *dev = ring->dev; + struct i915_hw_ppgtt *ppgtt = ctx_to_ppgtt(to); + int ret; + + BUG_ON(from && from->legacy_hw_ctx.rcs_state != NULL); + + if (USES_FULL_PPGTT(dev)) { + ret = ppgtt->switch_mm(ppgtt, ring, false); + if (ret) + return ret; + } + + if (from) + do_switch_fini_common(ring, from, to); + + return 0; +} + +static int do_switch_rcs(struct intel_engine_cs *ring, + struct intel_context *from, + struct intel_context *to) { struct drm_i915_private *dev_priv = ring->dev->dev_private; - struct intel_context *from = ring->last_context; struct i915_hw_ppgtt *ppgtt = ctx_to_ppgtt(to); u32 hw_flags = 0; bool uninitialized = false; int ret, i; - if (from != NULL && ring == &dev_priv->ring[RCS]) { + if (from != NULL) { BUG_ON(from->legacy_hw_ctx.rcs_state == NULL); - BUG_ON(!i915_gem_obj_is_pinned(from->legacy_hw_ctx.rcs_state)); + BUG_ON(!i915_gem_obj_ggtt_bound(from->legacy_hw_ctx.rcs_state)); } - if (from == to && !to->remap_slice) - return 0; - /* Trying to pin first makes error handling easier. */ - if (ring == &dev_priv->ring[RCS]) { - ret = i915_gem_obj_ggtt_pin(to->legacy_hw_ctx.rcs_state, - get_context_alignment(ring->dev), 0); - if (ret) - return ret; - } + ret = i915_gem_obj_ggtt_pin(to->legacy_hw_ctx.rcs_state, + get_context_alignment(ring->dev), 0); + if (ret) + return ret; /* * Pin can switch back to the default context if we end up calling into @@ -650,12 +677,6 @@ static int do_switch(struct intel_engine_cs *ring, goto unpin_out; } - if (ring != &dev_priv->ring[RCS]) { - if (from) - i915_gem_context_unreference(from); - goto done; - } - /* * Clear this page out of any CPU caches for coherent swap-in/out. Note * that thanks to write = false in this call and us not setting any gpu @@ -714,15 +735,11 @@ static int do_switch(struct intel_engine_cs *ring, /* obj is kept alive until the next request by its active ref */ i915_gem_object_ggtt_unpin(from->legacy_hw_ctx.rcs_state); - i915_gem_context_unreference(from); } uninitialized = !to->legacy_hw_ctx.initialized && from == NULL; to->legacy_hw_ctx.initialized = true; - -done: - i915_gem_context_reference(to); - ring->last_context = to; + do_switch_fini_common(ring, from, to); if (uninitialized) { ret = i915_gem_render_state_init(ring); @@ -733,8 +750,7 @@ done: return 0; unpin_out: - if (ring->id == RCS) - i915_gem_object_ggtt_unpin(to->legacy_hw_ctx.rcs_state); + i915_gem_object_ggtt_unpin(to->legacy_hw_ctx.rcs_state); return ret; } @@ -752,6 +768,7 @@ int i915_switch_context(struct intel_engine_cs *ring, struct intel_context *to) { struct drm_i915_private *dev_priv = ring->dev->dev_private; + struct intel_context *from = ring->last_context; WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex)); @@ -765,7 +782,13 @@ int i915_switch_context(struct intel_engine_cs *ring, return 0; } - return do_switch(ring, to); + if (from == to && !to->remap_slice) + return 0; + + if (ring->id == RCS) + return do_switch_rcs(ring, from, to); + else + return do_switch_xcs(ring, from, to); } static bool hw_context_enabled(struct drm_device *dev)