@@ -88,6 +88,7 @@
#include <drm/drmP.h>
#include <drm/i915_drm.h>
#include "i915_drv.h"
+#include "i915_trace.h"
/* This is a HW constraint. The value below is the largest known requirement
* I've seen in a spec to date, and that was a workaround for a non-shipping
@@ -136,6 +137,8 @@ static void ppgtt_release(struct kref *kref)
struct i915_hw_ppgtt *ppgtt =
container_of(kref, struct i915_hw_ppgtt, ref);
+ trace_ppgtt_release(ppgtt);
+
do_ppgtt_cleanup(ppgtt);
kfree(ppgtt);
}
@@ -245,6 +248,9 @@ create_vm_for_ctx(struct drm_device *dev, struct intel_context *ctx)
}
ppgtt->ctx = ctx;
+
+ trace_create_vm_for_ctx(ppgtt);
+
return ppgtt;
}
@@ -587,6 +587,47 @@ TRACE_EVENT(intel_gpu_freq_change,
TP_printk("new_freq=%u", __entry->freq)
);
+TRACE_EVENT(create_vm_for_ctx,
+
+ TP_PROTO(struct i915_hw_ppgtt *ppgtt),
+
+ TP_ARGS(ppgtt),
+
+ TP_STRUCT__entry(
+ __field(struct i915_address_space *, vm)
+ __field(u32, dev)
+ __field(u32, pid)
+ ),
+
+ TP_fast_assign(
+ __entry->vm = &ppgtt->base;
+ __entry->dev = ppgtt->base.dev->primary->index;
+ __entry->pid = (unsigned int)task_pid_nr(current);
+ ),
+
+ TP_printk("dev=%u, task_pid=%u, vm=%p",
+ __entry->dev, __entry->pid, __entry->vm)
+);
+
+TRACE_EVENT(ppgtt_release,
+
+ TP_PROTO(struct i915_hw_ppgtt *ppgtt),
+
+ TP_ARGS(ppgtt),
+
+ TP_STRUCT__entry(
+ __field(struct i915_address_space *, vm)
+ __field(u32, dev)
+ ),
+
+ TP_fast_assign(
+ __entry->vm = &ppgtt->base;
+ __entry->dev = ppgtt->base.dev->primary->index;
+ ),
+
+ TP_printk("dev=%u, vm=%p", __entry->dev, __entry->vm)
+);
+
#endif /* _I915_TRACE_H_ */
/* This part must be outside protection */