From patchwork Wed Jul 23 18:05:02 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sharma, Shashank" X-Patchwork-Id: 4612441 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 87755C0515 for ; Wed, 23 Jul 2014 18:02:06 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B6ED3201E4 for ; Wed, 23 Jul 2014 18:02:02 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id D477A20172 for ; Wed, 23 Jul 2014 18:01:58 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 655FE6E683; Wed, 23 Jul 2014 11:01:58 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id C3BF96E683 for ; Wed, 23 Jul 2014 11:01:57 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga102.fm.intel.com with ESMTP; 23 Jul 2014 11:01:56 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.01,718,1400050800"; d="scan'208";a="574341293" Received: from shashanks-desktop.iind.intel.com ([10.223.26.11]) by fmsmga002.fm.intel.com with ESMTP; 23 Jul 2014 11:00:50 -0700 From: shashank.sharma@intel.com To: intel-gfx@lists.freedesktop.org, ville.syrjala@linux.intel.com, damien.lespiau@intel.com, daniel.vetter@intel.com, shobhit.kumar@intel.com, satheeshakrishna.m@intel.com Date: Wed, 23 Jul 2014 23:35:02 +0530 Message-Id: <1406138705-17334-9-git-send-email-shashank.sharma@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1406138705-17334-1-git-send-email-shashank.sharma@intel.com> References: <1406138705-17334-1-git-send-email-shashank.sharma@intel.com> Cc: =indranil.mukherjee@intel.com Subject: [Intel-gfx] [PATCH 08/11] drm/i915: Add CRTC set property functions X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Shashank Sharma Color manager's pipe level correction properties are registered as CRTC property. So its required to have a .set_crtc function in CRTC functions. This patch adds: 1. A .set_property function for intel_crtc, intel_crtc_set_property which checks if a CRTC property is of type color property, it calls color manager's pipe level set_property handler function. 2. A intel_clrmgr_set_pipe_property, which will extract the data to be set, and then pass it to appropriate set_property function. Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_clrmgr.c | 47 ++++++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_clrmgr.h | 11 +++++++++ drivers/gpu/drm/i915/intel_display.c | 45 ++++++++++++++++++++++++++++++++++ 3 files changed, 103 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_clrmgr.c b/drivers/gpu/drm/i915/intel_clrmgr.c index a4c8f0f..eb18ee2 100644 --- a/drivers/gpu/drm/i915/intel_clrmgr.c +++ b/drivers/gpu/drm/i915/intel_clrmgr.c @@ -654,6 +654,53 @@ intel_attach_pipe_color_correction(struct intel_crtc *intel_crtc) kfree(features); } +bool intel_clrmgr_set_pipe_property(struct intel_crtc *intel_crtc, + struct clrmgr_regd_prop *cp, uint64_t value) +{ + bool ret = false; + uint64_t *data; + struct drm_property *property; + + /* Sanity */ + if (!cp->property) { + DRM_ERROR("NULL input to set_property\n"); + return false; + } + + property = cp->property; + DRM_DEBUG_DRIVER("Property %s len:%d\n", + cp->property->name, cp->property->num_values); + data = kmalloc(sizeof(uint64_t) * (property->num_values), GFP_KERNEL); + if (!data) { + DRM_ERROR("Out of memory\n"); + return false; + } + + if (copy_from_user((void *)data, (const void __user *)value, + property->num_values * sizeof(uint64_t))) { + DRM_ERROR("Failed to copy all data\n"); + ret = false; + goto free_and_return; + } + + /* Now do the actual work */ + if (cp->set_property) { + if (!cp->set_property((void *)intel_crtc, cp, data)) { + DRM_ERROR("Set property for %s failed\n", + cp->property->name); + ret = false; + } else { + ret = true; + cp->enabled = true; + DRM_DEBUG_DRIVER("Set property %s successful\n", + cp->property->name); + } + } +free_and_return: + kfree(data); + return ret; +} + struct clrmgr_status *intel_clrmgr_init(struct drm_device *dev) { struct clrmgr_status *status; diff --git a/drivers/gpu/drm/i915/intel_clrmgr.h b/drivers/gpu/drm/i915/intel_clrmgr.h index 6d316d2..d962585 100644 --- a/drivers/gpu/drm/i915/intel_clrmgr.h +++ b/drivers/gpu/drm/i915/intel_clrmgr.h @@ -212,6 +212,17 @@ bool intel_clrmgr_set_csc(void *crtc, struct clrmgr_regd_prop *csc, u64 *data); /* +* intel_clrmgr_set_pipe_property +* Set value of a registered CRTC property +* input: +* - intel_crtc: the CRTC with which the property is attached +* - cp: registered color property +* - value: value to be set +*/ +bool intel_clrmgr_set_pipe_property(struct intel_crtc *intel_crtc, + struct clrmgr_regd_prop *cp, uint64_t value); + +/* * intel_clrmgr_register_pipe_property * register set of properties with a CRTC * input: diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 99eb7ca..a6181b5 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -42,6 +42,7 @@ #include #include #include +#include "intel_clrmgr.h" /* Primary plane formats supported by all gen */ #define COMMON_PRIMARY_FORMATS \ @@ -8438,6 +8439,49 @@ mode_fits_in_fbdev(struct drm_device *dev, #endif } +/* +* intel_crtc_set_property +* Set a CRTC property, like color tweaks +*/ +static int intel_crtc_set_property(struct drm_crtc *crtc, + struct drm_property *property, uint64_t val) +{ + int ret = 0; + int count = 0; + struct clrmgr_regd_prop *cp; + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + struct clrmgr_status *status = intel_crtc->color_status; + + DRM_DEBUG_DRIVER("\n"); + + /* Is this color property ?*/ + if (!status) { + DRM_DEBUG_DRIVER("Color manager not initialized\n"); + ret = -1; + goto skip_color; + } + + /* Color correction property */ + while (count < status->no_of_properties) { + cp = status->cp[count++]; + if (property == cp->property) { + /* Found it, now set it */ + if (intel_clrmgr_set_pipe_property(intel_crtc, + cp, val)) { + DRM_DEBUG_DRIVER("Set property %s successful\n", + property->name); + return 0; + } else { + DRM_ERROR("Set CRTC property %s failed\n", + property->name); + return -1; + } + } + } +skip_color: + return ret; +} + bool intel_get_load_detect_pipe(struct drm_connector *connector, struct drm_display_mode *mode, struct intel_load_detect_pipe *old, @@ -11347,6 +11391,7 @@ static const struct drm_crtc_funcs intel_crtc_funcs = { .set_config = intel_crtc_set_config, .destroy = intel_crtc_destroy, .page_flip = intel_crtc_page_flip, + .set_property = intel_crtc_set_property, }; static bool ibx_pch_dpll_get_hw_state(struct drm_i915_private *dev_priv,