From patchwork Tue Sep 16 23:19:05 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rodrigo Vivi X-Patchwork-Id: 4921611 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 90BE69F2EC for ; Tue, 16 Sep 2014 23:17:28 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3DAC72015A for ; Tue, 16 Sep 2014 23:19:16 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 64BD920142 for ; Tue, 16 Sep 2014 23:19:15 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DFF4E6E1A4; Tue, 16 Sep 2014 16:19:14 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-pa0-f54.google.com (mail-pa0-f54.google.com [209.85.220.54]) by gabe.freedesktop.org (Postfix) with ESMTP id 084E16E1A4 for ; Tue, 16 Sep 2014 16:19:14 -0700 (PDT) Received: by mail-pa0-f54.google.com with SMTP id lj1so780084pab.27 for ; Tue, 16 Sep 2014 16:19:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=W/EqIvNBxr6bB4Qz0Vzk5JnbF3h+MdVXTy0XxW5fPbs=; b=RXMTJLMSgmWkR/GpmIWfaav5mq/CgjQn+8HNOhxXlfuceMCd2LzPOUyR8yIacZkSiJ /cztvWO40L40ua+vY+WdV9mMXymd4ibuHrABxqvcsmVjX0cPgErLbdOVEbulielvmr8Y RbbnHpo4kv2E1RfTKeQbaXGBBLk20m/qkP2kwCXwDjGAz/gkjSYPky8qfkHB8qYbZlMo 4/3+Q/21eFFcDaks1AMXoz9kC5YcfczgpNIJQHVFM67gVHir2G0W2AViefBCWQ5rIW11 yWAPHQyFdxXlYMtmNydkq3kr3pOynkq0bXgahLC2R6G7L3fnB6zmCfX6xp+qlXQLAkGZ ZCkA== X-Received: by 10.68.106.97 with SMTP id gt1mr291810pbb.117.1410909553827; Tue, 16 Sep 2014 16:19:13 -0700 (PDT) Received: from rdvivi-bratislava.home (static-50-43-14-60.bvtn.or.frontiernet.net. [50.43.14.60]) by mx.google.com with ESMTPSA id v1sm15068998pdp.76.2014.09.16.16.19.11 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 16 Sep 2014 16:19:12 -0700 (PDT) From: Rodrigo Vivi X-Google-Original-From: Rodrigo Vivi To: intel-gfx@lists.freedesktop.org Date: Tue, 16 Sep 2014 19:19:05 -0400 Message-Id: <1410909548-4945-1-git-send-email-rodrigo.vivi@intel.com> X-Mailer: git-send-email 1.9.3 Cc: Rodrigo Vivi Subject: [Intel-gfx] [PATCH 1/4] drm/i915: PSR: organize setup function. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP psr_enabled is already by itself a setup once so let's put the W/As there and rename old setup once to setup_vsc. Signed-off-by: Rodrigo Vivi Reviewed-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_dp.c | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index d9091dc7..271788e 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -1755,10 +1755,8 @@ static void intel_edp_psr_write_vsc(struct intel_dp *intel_dp, POSTING_READ(ctl_reg); } -static void intel_edp_psr_setup(struct intel_dp *intel_dp) +static void intel_edp_psr_setup_vsc(struct intel_dp *intel_dp) { - struct drm_device *dev = intel_dp_to_dev(intel_dp); - struct drm_i915_private *dev_priv = dev->dev_private; struct edp_vsc_psr psr_vsc; /* Prepare VSC packet as per EDP 1.3 spec, Table 3.10 */ @@ -1768,10 +1766,6 @@ static void intel_edp_psr_setup(struct intel_dp *intel_dp) psr_vsc.sdp_header.HB2 = 0x2; psr_vsc.sdp_header.HB3 = 0x8; intel_edp_psr_write_vsc(intel_dp, &psr_vsc); - - /* Avoid continuous PSR exit by masking memup and hpd */ - I915_WRITE(EDP_PSR_DEBUG_CTL(dev), EDP_PSR_DEBUG_MASK_MEMUP | - EDP_PSR_DEBUG_MASK_HPD | EDP_PSR_DEBUG_MASK_LPSP); } static void intel_edp_psr_enable_sink(struct intel_dp *intel_dp) @@ -1924,8 +1918,11 @@ void intel_edp_psr_enable(struct intel_dp *intel_dp) dev_priv->psr.busy_frontbuffer_bits = 0; - /* Setup PSR once */ - intel_edp_psr_setup(intel_dp); + intel_edp_psr_setup_vsc(intel_dp); + + /* Avoid continuous PSR exit by masking memup and hpd */ + I915_WRITE(EDP_PSR_DEBUG_CTL(dev), EDP_PSR_DEBUG_MASK_MEMUP | + EDP_PSR_DEBUG_MASK_HPD | EDP_PSR_DEBUG_MASK_LPSP); if (intel_edp_psr_match_conditions(intel_dp)) dev_priv->psr.enabled = intel_dp;