From patchwork Thu Sep 18 19:43:16 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gustavo Padovan X-Patchwork-Id: 4933701 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id CF5A99F466 for ; Thu, 18 Sep 2014 19:43:05 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 66857201B4 for ; Thu, 18 Sep 2014 19:43:33 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 6FC4820179 for ; Thu, 18 Sep 2014 19:43:32 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EDDBC6E0E9; Thu, 18 Sep 2014 12:43:31 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-yk0-f178.google.com (mail-yk0-f178.google.com [209.85.160.178]) by gabe.freedesktop.org (Postfix) with ESMTP id 225A26E0E9; Thu, 18 Sep 2014 12:43:31 -0700 (PDT) Received: by mail-yk0-f178.google.com with SMTP id 200so300944ykr.37 for ; Thu, 18 Sep 2014 12:43:30 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=+oEq9tAeaHxrroJ5edaWWjamT2IMo8eFHiowDF+lw7g=; b=ReTx+wx/sLxVwTWfKfp5HJSCfdv38BDVL7LtZGOeQZwvGyg2/rcrYTJ3D3a89uc3lE zog2YnJ2n1SAy+OF84mKyOL+xrC7D9Bi2D2w6fBqR+Lw4++hkkyfI2G+EZ3pywXBnncw 2NZsw7OXaZRugQZ/cHW5KWR2QuCOMc4/yv2NEwltabO8YTE5+I20r03ieTWZNfHT7Vnj UNNk5OYXG2QXer9gPZs8RqRZj/7cPaukWwFc5uvOsgnKRrJW9HIT6WcWgpQ1R7OH2Ziy UJa/VEZdPLodyGoIRvMoaNpWFDS4nE4osS/LmUclIcFhJ2Mkl80vue9mFi5xbGBa6sbh gKbQ== X-Received: by 10.236.65.38 with SMTP id e26mr5198749yhd.164.1411069410713; Thu, 18 Sep 2014 12:43:30 -0700 (PDT) Received: from localhost.localdomain ([201.82.54.151]) by mx.google.com with ESMTPSA id f65sm9443578yha.9.2014.09.18.12.43.28 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 18 Sep 2014 12:43:29 -0700 (PDT) From: Gustavo Padovan To: intel-gfx@lists.freedesktop.org Date: Thu, 18 Sep 2014 16:43:16 -0300 Message-Id: <1411069396-28051-5-git-send-email-gustavo@padovan.org> X-Mailer: git-send-email 1.9.3 In-Reply-To: <1411069396-28051-1-git-send-email-gustavo@padovan.org> References: <1411069396-28051-1-git-send-email-gustavo@padovan.org> Cc: Gustavo Padovan , dri-devel@lists.freedesktop.org Subject: [Intel-gfx] [PATCH 5/5] drm/i915: remove intel_pipe_set_base() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Gustavo Padovan After some refactor intel_primary_plane_setplane() does the same as intel_pipe_set_base() so we can get rid of it and replace the calls with intel_primary_plane_setplane(). Signed-off-by: Gustavo Padovan --- drivers/gpu/drm/i915/intel_display.c | 79 ++++-------------------------------- 1 file changed, 8 insertions(+), 71 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 6c61c8f..2477587 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2763,74 +2763,6 @@ static void intel_update_pipe_size(struct intel_crtc *crtc) crtc->config.pipe_src_h = adjusted_mode->crtc_vdisplay; } -static int -intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, - struct drm_framebuffer *fb) -{ - struct drm_device *dev = crtc->dev; - struct drm_i915_private *dev_priv = dev->dev_private; - struct intel_crtc *intel_crtc = to_intel_crtc(crtc); - enum pipe pipe = intel_crtc->pipe; - struct drm_framebuffer *old_fb = crtc->primary->fb; - struct drm_i915_gem_object *obj = intel_fb_obj(fb); - struct drm_i915_gem_object *old_obj = intel_fb_obj(old_fb); - int ret; - - if (intel_crtc_has_pending_flip(crtc)) { - DRM_ERROR("pipe is still busy with an old pageflip\n"); - return -EBUSY; - } - - /* no fb bound */ - if (!fb) { - DRM_ERROR("No FB bound\n"); - return 0; - } - - if (intel_crtc->plane > INTEL_INFO(dev)->num_pipes) { - DRM_ERROR("no plane for crtc: plane %c, num_pipes %d\n", - plane_name(intel_crtc->plane), - INTEL_INFO(dev)->num_pipes); - return -EINVAL; - } - - mutex_lock(&dev->struct_mutex); - ret = intel_pin_and_fence_fb_obj(dev, obj, NULL); - if (ret == 0) - i915_gem_track_fb(old_obj, obj, - INTEL_FRONTBUFFER_PRIMARY(pipe)); - mutex_unlock(&dev->struct_mutex); - if (ret != 0) { - DRM_ERROR("pin & fence failed\n"); - return ret; - } - - intel_update_pipe_size(intel_crtc); - - dev_priv->display.update_primary_plane(crtc, fb, x, y); - - if (intel_crtc->active) - intel_frontbuffer_flip(dev, INTEL_FRONTBUFFER_PRIMARY(pipe)); - - crtc->primary->fb = fb; - crtc->x = x; - crtc->y = y; - - if (old_fb) { - if (intel_crtc->active && old_fb != fb) - intel_wait_for_vblank(dev, intel_crtc->pipe); - mutex_lock(&dev->struct_mutex); - intel_unpin_fb_obj(old_obj); - mutex_unlock(&dev->struct_mutex); - } - - mutex_lock(&dev->struct_mutex); - intel_update_fbc(dev); - mutex_unlock(&dev->struct_mutex); - - return 0; -} - static void intel_fdi_normal_train(struct drm_crtc *crtc) { struct drm_device *dev = crtc->dev; @@ -9797,6 +9729,7 @@ static int intel_crtc_commit_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *old_fb = crtc->primary->fb; struct drm_i915_gem_object *obj = intel_fb_obj(fb); struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + struct drm_plane *primary = crtc->primary; enum pipe pipe = intel_crtc->pipe; struct intel_unpin_work *work; struct intel_engine_cs *ring; @@ -9938,7 +9871,9 @@ free_work: if (ret == -EIO) { out_hang: intel_crtc_wait_for_pending_flips(crtc); - ret = intel_pipe_set_base(crtc, crtc->x, crtc->y, fb); + ret = primary->funcs->update_plane(primary, crtc, fb, + 0, 0, 0, 0, + crtc->x, crtc->y, 0, 0); if (ret == 0 && event) { spin_lock_irq(&dev->event_lock); drm_send_vblank_event(dev, pipe, event); @@ -11475,11 +11410,13 @@ static int intel_crtc_set_config(struct drm_mode_set *set) set->x, set->y, set->fb); } else if (config->fb_changed) { struct intel_crtc *intel_crtc = to_intel_crtc(set->crtc); + struct drm_plane *primary = set->crtc->primary; intel_crtc_wait_for_pending_flips(set->crtc); - ret = intel_pipe_set_base(set->crtc, - set->x, set->y, set->fb); + ret = primary->funcs->update_plane(primary, set->crtc, set->fb, + 0, 0, 0, 0, + set->x, set->y, 0, 0); /* * We need to make sure the primary plane is re-enabled if it