From patchwork Fri Sep 19 18:47:05 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jike Song X-Patchwork-Id: 4935371 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id E3EAFBEEA5 for ; Fri, 19 Sep 2014 03:10:12 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 146862011E for ; Fri, 19 Sep 2014 03:10:12 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 206FA201B4 for ; Fri, 19 Sep 2014 03:10:11 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 96FA36E3F9; Thu, 18 Sep 2014 20:10:10 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 416DB6E3F9 for ; Thu, 18 Sep 2014 20:10:10 -0700 (PDT) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga102.jf.intel.com with ESMTP; 18 Sep 2014 20:03:58 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.04,551,1406617200"; d="scan'208";a="575475891" Received: from kvmgt.bj.intel.com ([10.238.154.64]) by orsmga001.jf.intel.com with ESMTP; 18 Sep 2014 20:10:08 -0700 From: Jike Song To: daniel.vetter@intel.com Date: Sat, 20 Sep 2014 02:47:05 +0800 Message-Id: <1411152428-7226-6-git-send-email-jike.song@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1411152428-7226-1-git-send-email-jike.song@intel.com> References: <1411152428-7226-1-git-send-email-jike.song@intel.com> Cc: intel-gfx@lists.freedesktop.org Subject: [Intel-gfx] [PATCH 5/8] drm/i915: Add the display switch logic for vgpu in i915 driver X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-1.7 required=5.0 tests=BAYES_00, DATE_IN_FUTURE_12_24, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Yu Zhang Display switch logic is added to notify the vgt mediator that current vgpu have a valid surface to show. It does so by writing the display_ready field in PV INFO page, and then will be handled in vgt mediator. This is useful to avoid trickiness when the VM's framebuffer is being accessed in the middle of VM modesetting, e.g. compositing the framebuffer in the host side Signed-off-by: Yu Zhang Signed-off-by: Jike Song Signed-off-by: Zhiyuan Lv --- drivers/gpu/drm/i915/i915_dma.c | 8 ++++++++ drivers/gpu/drm/i915/i915_reg.h | 7 +++++++ drivers/gpu/drm/i915/intel_display.c | 10 ++++++++++ 3 files changed, 25 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index bb4ad52..d9462e1 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c @@ -1790,6 +1790,14 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) } else { /* Start out suspended in ums mode. */ dev_priv->ums.mm_suspended = 1; + if (intel_vgpu_active(dev)) { + /* + * Notify a valid surface after modesetting, + * when running inside a VM. + */ + I915_WRITE(vgt_info_off(display_ready), + VGT_DRV_DISPLAY_READY); + } } i915_setup_sysfs(dev); diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index a70f12e..38d606c 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -6673,5 +6673,12 @@ enum punit_power_well { #define vgt_info_off(x) \ (VGT_PVINFO_PAGE + (long)&((struct vgt_if *) NULL)->x) +/* + * The information set by the guest gfx driver, through the display_ready field + */ +enum vgt_display_status { + VGT_DRV_DISPLAY_NOT_READY = 0, + VGT_DRV_DISPLAY_READY, /* ready for display switch */ +}; #endif /* _I915_REG_H_ */ diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index b78f00a..3af9259 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -11642,6 +11642,16 @@ static int intel_crtc_set_config(struct drm_mode_set *set) intel_modeset_check_state(set->crtc->dev); } + if (intel_vgpu_active(dev)) { + /* + * Notify a valid surface after modesetting, + * when running inside a VM. + */ + struct drm_i915_private *dev_priv = dev->dev_private; + + I915_WRITE(vgt_info_off(display_ready), VGT_DRV_DISPLAY_READY); + } + if (ret) { DRM_DEBUG_KMS("failed to set mode on [CRTC:%d], err = %d\n", set->crtc->base.id, ret);