| Message ID | 1411153495-2658-1-git-send-email-przanoni@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> On Fri, Sep 19, 2014 at 12:04 PM, Paulo Zanoni <przanoni@gmail.com> wrote: > From: Paulo Zanoni <paulo.r.zanoni@intel.com> > > Because I plan to expand it a little bit. > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> > --- > drivers/gpu/drm/i915/intel_pm.c | 50 > +++++++++++++++++++++++------------------ > 1 file changed, 28 insertions(+), 22 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c > b/drivers/gpu/drm/i915/intel_pm.c > index 1ec3c8f..2ca9fdb 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -7358,33 +7358,39 @@ void intel_fini_runtime_pm(struct drm_i915_private > *dev_priv) > pm_runtime_disable(device); > } > > +static void intel_init_fbc(struct drm_i915_private *dev_priv) > +{ > + if (!HAS_FBC(dev_priv)) > + return; > + > + if (INTEL_INFO(dev_priv)->gen >= 7) { > + dev_priv->display.fbc_enabled = ironlake_fbc_enabled; > + dev_priv->display.enable_fbc = gen7_enable_fbc; > + dev_priv->display.disable_fbc = ironlake_disable_fbc; > + } else if (INTEL_INFO(dev_priv)->gen >= 5) { > + dev_priv->display.fbc_enabled = ironlake_fbc_enabled; > + dev_priv->display.enable_fbc = ironlake_enable_fbc; > + dev_priv->display.disable_fbc = ironlake_disable_fbc; > + } else if (IS_GM45(dev_priv)) { > + dev_priv->display.fbc_enabled = g4x_fbc_enabled; > + dev_priv->display.enable_fbc = g4x_enable_fbc; > + dev_priv->display.disable_fbc = g4x_disable_fbc; > + } else { > + dev_priv->display.fbc_enabled = i8xx_fbc_enabled; > + dev_priv->display.enable_fbc = i8xx_enable_fbc; > + dev_priv->display.disable_fbc = i8xx_disable_fbc; > + > + /* This value was pulled out of someone's hat */ > + I915_WRITE(FBC_CONTROL, 500 << FBC_CTL_INTERVAL_SHIFT); > + } > +} > + > /* Set up chip specific power management-related functions */ > void intel_init_pm(struct drm_device *dev) > { > struct drm_i915_private *dev_priv = dev->dev_private; > > - if (HAS_FBC(dev)) { > - if (INTEL_INFO(dev)->gen >= 7) { > - dev_priv->display.fbc_enabled = > ironlake_fbc_enabled; > - dev_priv->display.enable_fbc = gen7_enable_fbc; > - dev_priv->display.disable_fbc = > ironlake_disable_fbc; > - } else if (INTEL_INFO(dev)->gen >= 5) { > - dev_priv->display.fbc_enabled = > ironlake_fbc_enabled; > - dev_priv->display.enable_fbc = ironlake_enable_fbc; > - dev_priv->display.disable_fbc = > ironlake_disable_fbc; > - } else if (IS_GM45(dev)) { > - dev_priv->display.fbc_enabled = g4x_fbc_enabled; > - dev_priv->display.enable_fbc = g4x_enable_fbc; > - dev_priv->display.disable_fbc = g4x_disable_fbc; > - } else { > - dev_priv->display.fbc_enabled = i8xx_fbc_enabled; > - dev_priv->display.enable_fbc = i8xx_enable_fbc; > - dev_priv->display.disable_fbc = i8xx_disable_fbc; > - > - /* This value was pulled out of someone's hat */ > - I915_WRITE(FBC_CONTROL, 500 << > FBC_CTL_INTERVAL_SHIFT); > - } > - } > + intel_init_fbc(dev_priv); > > /* For cxsr */ > if (IS_PINEVIEW(dev)) > -- > 2.1.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx >
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 1ec3c8f..2ca9fdb 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -7358,33 +7358,39 @@ void intel_fini_runtime_pm(struct drm_i915_private *dev_priv) pm_runtime_disable(device); } +static void intel_init_fbc(struct drm_i915_private *dev_priv) +{ + if (!HAS_FBC(dev_priv)) + return; + + if (INTEL_INFO(dev_priv)->gen >= 7) { + dev_priv->display.fbc_enabled = ironlake_fbc_enabled; + dev_priv->display.enable_fbc = gen7_enable_fbc; + dev_priv->display.disable_fbc = ironlake_disable_fbc; + } else if (INTEL_INFO(dev_priv)->gen >= 5) { + dev_priv->display.fbc_enabled = ironlake_fbc_enabled; + dev_priv->display.enable_fbc = ironlake_enable_fbc; + dev_priv->display.disable_fbc = ironlake_disable_fbc; + } else if (IS_GM45(dev_priv)) { + dev_priv->display.fbc_enabled = g4x_fbc_enabled; + dev_priv->display.enable_fbc = g4x_enable_fbc; + dev_priv->display.disable_fbc = g4x_disable_fbc; + } else { + dev_priv->display.fbc_enabled = i8xx_fbc_enabled; + dev_priv->display.enable_fbc = i8xx_enable_fbc; + dev_priv->display.disable_fbc = i8xx_disable_fbc; + + /* This value was pulled out of someone's hat */ + I915_WRITE(FBC_CONTROL, 500 << FBC_CTL_INTERVAL_SHIFT); + } +} + /* Set up chip specific power management-related functions */ void intel_init_pm(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; - if (HAS_FBC(dev)) { - if (INTEL_INFO(dev)->gen >= 7) { - dev_priv->display.fbc_enabled = ironlake_fbc_enabled; - dev_priv->display.enable_fbc = gen7_enable_fbc; - dev_priv->display.disable_fbc = ironlake_disable_fbc; - } else if (INTEL_INFO(dev)->gen >= 5) { - dev_priv->display.fbc_enabled = ironlake_fbc_enabled; - dev_priv->display.enable_fbc = ironlake_enable_fbc; - dev_priv->display.disable_fbc = ironlake_disable_fbc; - } else if (IS_GM45(dev)) { - dev_priv->display.fbc_enabled = g4x_fbc_enabled; - dev_priv->display.enable_fbc = g4x_enable_fbc; - dev_priv->display.disable_fbc = g4x_disable_fbc; - } else { - dev_priv->display.fbc_enabled = i8xx_fbc_enabled; - dev_priv->display.enable_fbc = i8xx_enable_fbc; - dev_priv->display.disable_fbc = i8xx_disable_fbc; - - /* This value was pulled out of someone's hat */ - I915_WRITE(FBC_CONTROL, 500 << FBC_CTL_INTERVAL_SHIFT); - } - } + intel_init_fbc(dev_priv); /* For cxsr */ if (IS_PINEVIEW(dev))