From patchwork Tue Oct 7 15:09:43 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: vandana.kannan@intel.com X-Patchwork-Id: 5046611 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id AABE39F349 for ; Tue, 7 Oct 2014 14:56:09 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BD7DC20222 for ; Tue, 7 Oct 2014 14:56:08 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id AEB0E2022A for ; Tue, 7 Oct 2014 14:56:07 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 30EEC6E114; Tue, 7 Oct 2014 07:56:07 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id 6892F6E114 for ; Tue, 7 Oct 2014 07:56:06 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga102.fm.intel.com with ESMTP; 07 Oct 2014 07:56:03 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.04,670,1406617200"; d="scan'208";a="610839868" Received: from vkannan-desktop.iind.intel.com ([10.223.25.137]) by fmsmga002.fm.intel.com with ESMTP; 07 Oct 2014 07:54:54 -0700 From: Vandana Kannan To: intel-gfx@lists.freedesktop.org Date: Tue, 7 Oct 2014 20:39:43 +0530 Message-Id: <1412694584-743-6-git-send-email-vandana.kannan@intel.com> X-Mailer: git-send-email 2.0.1 In-Reply-To: <1412694584-743-1-git-send-email-vandana.kannan@intel.com> References: <1412694584-743-1-git-send-email-vandana.kannan@intel.com> Subject: [Intel-gfx] [RFC 5/6] drm/i915: Replace all refs to intel_dp delays X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Replacing intel_dp PPS delays with intel_panel PPS delays. This is part of removing all refs to PPS in intel_dp and moving it to PPS in intel_panel. Signed-off-by: Vandana Kannan --- drivers/gpu/drm/i915/intel_dp.c | 22 +++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 79ccf5a..36c6b3b 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -496,6 +496,7 @@ static int edp_notify_handler(struct notifier_block *this, unsigned long code, edp_notifier); struct drm_device *dev = intel_dp_to_dev(intel_dp); struct drm_i915_private *dev_priv = dev->dev_private; + struct intel_connector *intel_connector = intel_dp->attached_connector; u32 pp_div; u32 pp_ctrl_reg, pp_div_reg; @@ -515,7 +516,7 @@ static int edp_notify_handler(struct notifier_block *this, unsigned long code, /* 0x1F write to PP_DIV_REG sets max cycle delay */ I915_WRITE(pp_div_reg, pp_div | 0x1F); I915_WRITE(pp_ctrl_reg, PANEL_UNLOCK_REGS | PANEL_POWER_OFF); - msleep(intel_dp->panel_power_cycle_delay); + msleep(intel_connector->panel.pps.panel_power_cycle_delay); } pps_unlock(intel_dp); @@ -1320,26 +1321,29 @@ static void wait_panel_off(struct intel_dp *intel_dp) static void wait_panel_power_cycle(struct intel_dp *intel_dp) { + struct intel_connector *intel_connector = intel_dp->attached_connector; DRM_DEBUG_KMS("Wait for panel power cycle\n"); /* When we disable the VDD override bit last we have to do the manual * wait. */ wait_remaining_ms_from_jiffies(intel_dp->last_power_cycle, - intel_dp->panel_power_cycle_delay); + intel_connector->panel.pps.panel_power_cycle_delay); wait_panel_status(intel_dp, IDLE_CYCLE_MASK, IDLE_CYCLE_VALUE); } static void wait_backlight_on(struct intel_dp *intel_dp) { + struct intel_connector *intel_connector = intel_dp->attached_connector; wait_remaining_ms_from_jiffies(intel_dp->last_power_on, - intel_dp->backlight_on_delay); + intel_connector->panel.pps.backlight_on_delay); } static void edp_wait_backlight_off(struct intel_dp *intel_dp) { + struct intel_connector *intel_connector = intel_dp->attached_connector; wait_remaining_ms_from_jiffies(intel_dp->last_backlight_off, - intel_dp->backlight_off_delay); + intel_connector->panel.pps.backlight_off_delay); } /* Read the current pp_control value, unlocking the register if it @@ -1370,6 +1374,7 @@ static bool edp_panel_vdd_on(struct intel_dp *intel_dp) struct drm_device *dev = intel_dp_to_dev(intel_dp); struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); struct intel_encoder *intel_encoder = &intel_dig_port->base; + struct intel_connector *intel_connector = intel_dp->attached_connector; struct drm_i915_private *dev_priv = dev->dev_private; enum intel_display_power_domain power_domain; u32 pp; @@ -1409,7 +1414,7 @@ static bool edp_panel_vdd_on(struct intel_dp *intel_dp) */ if (!edp_have_panel_power(intel_dp)) { DRM_DEBUG_KMS("eDP was not running\n"); - msleep(intel_dp->panel_power_up_delay); + msleep(intel_connector->panel.pps.panel_power_up_delay); } return need_to_disable; @@ -1489,6 +1494,7 @@ static void edp_panel_vdd_work(struct work_struct *__work) static void edp_panel_vdd_schedule_off(struct intel_dp *intel_dp) { + struct intel_connector *intel_connector = intel_dp->attached_connector; unsigned long delay; /* @@ -1496,7 +1502,8 @@ static void edp_panel_vdd_schedule_off(struct intel_dp *intel_dp) * down delay) to keep the panel power up across a sequence of * operations. */ - delay = msecs_to_jiffies(intel_dp->panel_power_cycle_delay * 5); + delay = msecs_to_jiffies( + intel_connector->panel.pps.panel_power_cycle_delay * 5); schedule_delayed_work(&intel_dp->panel_vdd_work, delay); } @@ -3659,6 +3666,7 @@ static void intel_dp_link_down(struct intel_dp *intel_dp) { struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); + struct intel_connector *intel_connector = intel_dp->attached_connector; enum port port = intel_dig_port->port; struct drm_device *dev = intel_dig_port->base.base.dev; struct drm_i915_private *dev_priv = dev->dev_private; @@ -3717,7 +3725,7 @@ intel_dp_link_down(struct intel_dp *intel_dp) DP &= ~DP_AUDIO_OUTPUT_ENABLE; I915_WRITE(intel_dp->output_reg, DP & ~DP_PORT_EN); POSTING_READ(intel_dp->output_reg); - msleep(intel_dp->panel_power_down_delay); + msleep(intel_connector->panel.pps.panel_power_down_delay); } static bool