From patchwork Tue Oct 7 17:11:25 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michel Thierry X-Patchwork-Id: 5047891 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id E55A19F295 for ; Tue, 7 Oct 2014 17:12:50 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 05FB8201F7 for ; Tue, 7 Oct 2014 17:12:50 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 9EE8A20109 for ; Tue, 7 Oct 2014 17:12:44 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E3EB46E185; Tue, 7 Oct 2014 10:12:43 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id D19F56E185 for ; Tue, 7 Oct 2014 10:12:42 -0700 (PDT) Received: from azsmga001.ch.intel.com ([10.2.17.19]) by fmsmga101.fm.intel.com with ESMTP; 07 Oct 2014 10:11:55 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.04,671,1406617200"; d="scan'208";a="482578176" Received: from michelth-linux.isw.intel.com ([10.102.226.151]) by azsmga001.ch.intel.com with ESMTP; 07 Oct 2014 10:11:52 -0700 From: Michel Thierry To: intel-gfx@lists.freedesktop.org Date: Tue, 7 Oct 2014 18:11:25 +0100 Message-Id: <1412701894-28905-30-git-send-email-michel.thierry@intel.com> X-Mailer: git-send-email 2.0.3 In-Reply-To: <1412701894-28905-1-git-send-email-michel.thierry@intel.com> References: <1412701894-28905-1-git-send-email-michel.thierry@intel.com> Subject: [Intel-gfx] [RFC 29/38] drm/i915/bdw: Use dynamic allocation idioms on free X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Ben Widawsky The page directory freer is left here for now as it's still useful given that GEN8 still preallocates. Once the allocation functions are broken up into more discrete chunks, we'll follow suit and destroy this leftover piece. v2: Match trace_i915_va_teardown params Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry (v2) --- drivers/gpu/drm/i915/i915_gem_gtt.c | 46 ++++++++++++++++++++++++------------- drivers/gpu/drm/i915/i915_gem_gtt.h | 26 +++++++++++++++++++++ 2 files changed, 56 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index e221874..8c3bb45 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -522,27 +522,41 @@ static void gen8_ppgtt_insert_entries(struct i915_address_space *vm, } } -static void gen8_free_page_tables(struct i915_pagedir *pd, struct drm_device *dev) +static void gen8_teardown_va_range(struct i915_address_space *vm, + uint64_t start, uint64_t length) { - int i; - - if (!pd->page) - return; - - for (i = 0; i < I915_PDES_PER_PD; i++) { - free_pt_single(pd->page_tables[i], dev); - pd->page_tables[i] = NULL; + struct i915_hw_ppgtt *ppgtt = + container_of(vm, struct i915_hw_ppgtt, base); + struct i915_pagedir *pd; + struct i915_pagetab *pt; + uint64_t temp; + uint32_t pdpe, pde; + + gen8_for_each_pdpe(pd, &ppgtt->pdp, start, length, temp, pdpe) { + uint64_t pd_len = gen8_clamp_pd(start, length); + uint64_t pd_start = start; + gen8_for_each_pde(pt, pd, pd_start, pd_len, temp, pde) { + free_pt_single(pt, vm->dev); + } + free_pd_single(pd, vm->dev); } } -static void gen8_ppgtt_free(struct i915_hw_ppgtt *ppgtt) +/* This function will die soon */ +static void gen8_free_full_pagedir(struct i915_hw_ppgtt *ppgtt, int i) { - int i; + gen8_teardown_va_range(&ppgtt->base, + i << GEN8_PDPE_SHIFT, + (1 << GEN8_PDPE_SHIFT)); +} - for (i = 0; i < ppgtt->num_pd_pages; i++) { - gen8_free_page_tables(ppgtt->pdp.pagedirs[i], ppgtt->base.dev); - free_pd_single(ppgtt->pdp.pagedirs[i], ppgtt->base.dev); - } +static void gen8_ppgtt_free(struct i915_hw_ppgtt *ppgtt) +{ + trace_i915_va_teardown(&ppgtt->base, + ppgtt->base.start, ppgtt->base.total, + VM_TO_TRACE_NAME(&ppgtt->base)); + gen8_teardown_va_range(&ppgtt->base, + ppgtt->base.start, ppgtt->base.total); } static void gen8_ppgtt_cleanup(struct i915_address_space *vm) @@ -568,7 +582,7 @@ static int gen8_ppgtt_allocate_page_tables(struct i915_hw_ppgtt *ppgtt) unwind_out: while (i--) - gen8_free_page_tables(ppgtt->pdp.pagedirs[i], ppgtt->base.dev); + gen8_free_full_pagedir(ppgtt, i); return -ENOMEM; } diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h index 044ac67..9032fc4 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.h +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h @@ -397,6 +397,32 @@ static inline size_t gen6_pde_count(uint32_t addr, uint32_t length) return i915_pde_count(addr, length, GEN6_PDE_SHIFT); } +#define gen8_for_each_pde(pt, pd, start, length, temp, iter) \ + for (iter = gen8_pde_index(start), pt = (pd)->page_tables[iter]; \ + length > 0 && iter < I915_PDES_PER_PD; \ + pt = (pd)->page_tables[++iter], \ + temp = ALIGN(start+1, 1 << GEN8_PDE_SHIFT) - start, \ + temp = min(temp, length), \ + start += temp, length -= temp) + +#define gen8_for_each_pdpe(pd, pdp, start, length, temp, iter) \ + for (iter = gen8_pdpe_index(start), pd = (pdp)->pagedirs[iter]; \ + length > 0 && iter < GEN8_LEGACY_PDPES; \ + pd = (pdp)->pagedirs[++iter], \ + temp = ALIGN(start+1, 1 << GEN8_PDPE_SHIFT) - start, \ + temp = min(temp, length), \ + start += temp, length -= temp) + +/* Clamp length to the next pagedir boundary */ +static inline uint64_t gen8_clamp_pd(uint64_t start, uint64_t length) +{ + uint64_t next_pd = ALIGN(start + 1, 1 << GEN8_PDPE_SHIFT); + if (next_pd > (start + length)) + return length; + + return next_pd - start; +} + static inline uint32_t gen8_pte_index(uint64_t address) { return i915_pte_index(address, GEN8_PDE_SHIFT);