diff mbox

[RFC,05/38] drm/i915: Split out aliasing binds

Message ID 1412701894-28905-6-git-send-email-michel.thierry@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Michel Thierry Oct. 7, 2014, 5:11 p.m. UTC
From: Ben Widawsky <benjamin.widawsky@intel.com>

This patch finishes off  actually separating the aliasing and global
finds. Prior to this, all global binds would be aliased. Now if aliasing
binds are required, they must be explicitly asked for. So far, we have
no users of this outside of execbuf - but Mika has already submitted a
patch requiring just this.

A nice benefit of this is we should no longer be able to clobber GTT
only objects from the aliasing PPGTT.

v2: Only add aliasing binds for the GGTT/Aliasing PPGTT at execbuf

v3: Rebase resolution with changed size of flags

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h            | 2 +-
 drivers/gpu/drm/i915/i915_gem.c            | 6 ++++--
 drivers/gpu/drm/i915/i915_gem_execbuffer.c | 5 +++--
 drivers/gpu/drm/i915/i915_gem_gtt.c        | 3 +++
 4 files changed, 11 insertions(+), 5 deletions(-)

Comments

Daniel Vetter Oct. 8, 2014, 1:41 p.m. UTC | #1
On Tue, Oct 07, 2014 at 06:11:01PM +0100, Michel Thierry wrote:
> From: Ben Widawsky <benjamin.widawsky@intel.com>
>
> This patch finishes off  actually separating the aliasing and global
> finds. Prior to this, all global binds would be aliased. Now if aliasing
> binds are required, they must be explicitly asked for. So far, we have
> no users of this outside of execbuf - but Mika has already submitted a
> patch requiring just this.
>
> A nice benefit of this is we should no longer be able to clobber GTT
> only objects from the aliasing PPGTT.
>
> v2: Only add aliasing binds for the GGTT/Aliasing PPGTT at execbuf
>
> v3: Rebase resolution with changed size of flags
>
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> Signed-off-by: Michel Thierry <michel.thierry@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h            | 2 +-
>  drivers/gpu/drm/i915/i915_gem.c            | 6 ++++--
>  drivers/gpu/drm/i915/i915_gem_execbuffer.c | 5 +++--
>  drivers/gpu/drm/i915/i915_gem_gtt.c        | 3 +++
>  4 files changed, 11 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 6b60e90..c0fea18 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2620,7 +2620,7 @@ i915_gem_obj_ggtt_pin(struct drm_i915_gem_object *obj,
>        unsigned flags)
>  {
>   return i915_gem_object_pin(obj, i915_obj_to_ggtt(obj),
> -   alignment, flags | PIN_GLOBAL_ALIASED);
> +   alignment, flags | PIN_GLOBAL);

This hunk looks like a patch split mixup and should probably be in the
previous patch.

Also I'm not really clear on all these flags and what they should do with
pure ppgtt/pure ggtt address spaces. We probably need to lock down abuse
(well, potential bugs) through copious sprinkling of WARN_ONs.
-Daniel

>  }
>
>  static inline int
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index dfb20e6..98186b2 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -3512,8 +3512,10 @@ search_free:
>
>   WARN_ON(flags & PIN_MAPPABLE && !obj->map_and_fenceable);
>
> - if (flags & PIN_GLOBAL_ALIASED)
> - vma_bind_flags = GLOBAL_BIND | ALIASING_BIND;
> + if (flags & PIN_ALIASING)
> + vma_bind_flags = ALIASING_BIND;
> + if (flags & PIN_GLOBAL)
> + vma_bind_flags = GLOBAL_BIND;
>
>   trace_i915_vma_bind(vma, flags);
>   i915_gem_vma_bind(vma, obj->cache_level, vma_bind_flags);
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 92191f0..d3a89e6 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -527,10 +527,11 @@ i915_gem_execbuffer_reserve_vma(struct i915_vma *vma,
>  {
>   struct drm_i915_gem_object *obj = vma->obj;
>   struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
> - uint64_t flags;
> + uint64_t flags = 0;
>   int ret;
>
> - flags = 0;
> + if (i915_is_ggtt(vma->vm))
> + flags = PIN_ALIASING;
>   if (entry->flags & __EXEC_OBJECT_NEEDS_MAP)
>   flags |= PIN_MAPPABLE;
>   /* FIXME: What kind of bind does Chris want? */
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index d725883..ac0197f 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -1597,6 +1597,9 @@ static void ggtt_bind_vma(struct i915_vma *vma,
>   }
>   }
>
> + if (!(flags & ALIASING_BIND))
> + return;
> +
>   if (dev_priv->mm.aliasing_ppgtt &&
>      (!obj->has_aliasing_ppgtt_mapping ||
>       (cache_level != obj->cache_level))) {
> --
> 2.0.3
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 6b60e90..c0fea18 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2620,7 +2620,7 @@  i915_gem_obj_ggtt_pin(struct drm_i915_gem_object *obj,
 		      unsigned flags)
 {
 	return i915_gem_object_pin(obj, i915_obj_to_ggtt(obj),
-				   alignment, flags | PIN_GLOBAL_ALIASED);
+				   alignment, flags | PIN_GLOBAL);
 }
 
 static inline int
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index dfb20e6..98186b2 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3512,8 +3512,10 @@  search_free:
 
 	WARN_ON(flags & PIN_MAPPABLE && !obj->map_and_fenceable);
 
-	if (flags & PIN_GLOBAL_ALIASED)
-		vma_bind_flags = GLOBAL_BIND | ALIASING_BIND;
+	if (flags & PIN_ALIASING)
+		vma_bind_flags = ALIASING_BIND;
+	if (flags & PIN_GLOBAL)
+		vma_bind_flags = GLOBAL_BIND;
 
 	trace_i915_vma_bind(vma, flags);
 	i915_gem_vma_bind(vma, obj->cache_level, vma_bind_flags);
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 92191f0..d3a89e6 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -527,10 +527,11 @@  i915_gem_execbuffer_reserve_vma(struct i915_vma *vma,
 {
 	struct drm_i915_gem_object *obj = vma->obj;
 	struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
-	uint64_t flags;
+	uint64_t flags = 0;
 	int ret;
 
-	flags = 0;
+	if (i915_is_ggtt(vma->vm))
+		flags = PIN_ALIASING;
 	if (entry->flags & __EXEC_OBJECT_NEEDS_MAP)
 		flags |= PIN_MAPPABLE;
 	/* FIXME: What kind of bind does Chris want? */
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index d725883..ac0197f 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1597,6 +1597,9 @@  static void ggtt_bind_vma(struct i915_vma *vma,
 		}
 	}
 
+	if (!(flags & ALIASING_BIND))
+		return;
+
 	if (dev_priv->mm.aliasing_ppgtt &&
 	    (!obj->has_aliasing_ppgtt_mapping ||
 	     (cache_level != obj->cache_level))) {